PCB trace fanout (lp:#1799968)

Original report created by nats (nats-1)

(* This is a wishlist/feature request *)
While routing RF trace you often have to use really thick traces and large
clearances.
It's a problem as soon as you need to connect the pad of a component like a
QFN to the trace. (see attached picture)

A solution exists in other CAD, it's called fanout or neckdown. You define
an area around your component and this area disable/change constraint for
the concerned netclass.

A simple version would be to define an area where all constraint are set to
default, better solution is to define acceptable size in this area.

Features included in this wish:

- Automatic tapering of the line:
https://bugs.launchpad.net/kicad/+bug/1741317
- Handling of constraints Area:
https://bugs.launchpad.net/kicad/+bug/1654571 but with respect to a minimum
specified constraint. You can't handle that with just an area where there
are no constraint.
- And the specific part you need to have sort of linear growth of the
clearance/constraint when you go away from the pin (see the picture), that
part can be complicated to implement.

Original tags: clearance constraint trace wishlist