PCBNEW: zone fill and DRC time regression
Description
I've created and mentioned in issue #15764 that the time it takes to fill zones and run DRC has increased. We wanted to create an issue separate just for the time it takes to run DRC and zone fill.
Using a large board design, if schematics are open prior to running DRC it takes between 4'-5'. In a previous version, 6.99.0-1334-g05bca282, DRC with zone refill is 2'.
We've previously reported a similar regression for zone fills #12228 (closed) (closed) for the same larger board.
Steps to reproduce
- Open PCBNEW.
- Open schematics.
- Run DRC with zone refill and run a stopwatch.
KiCad Version
Version: 7.99.0-2948-ge1d7d1bca7, release build
Libraries:
wxWidgets 3.2.2
FreeType 2.13.2
HarfBuzz 8.2.1
FontConfig 2.14.2
libcurl/8.3.0 OpenSSL/3.1.3 zlib/1.3 brotli/1.1.0 zstd/1.5.5 libidn2/2.3.4 libpsl/0.21.2 (+libidn2/2.3.4) libssh2/1.11.0 nghttp2/1.56.0
Platform: Arch Linux, 64 bit, Little endian, wxGTK, X11, KDE, x11
Build Info:
Date: Sep 27 2023 13:13:14
wxWidgets: 3.2.2 (wchar_t,wx containers) GTK+ 3.24
Boost: 1.83.0
OCC: 7.6.3
Curl: 8.3.0
ngspice: 41
Compiler: GCC 13.2.1 with C++ ABI 1018
Build settings:
KICAD_USE_EGL=ON