Mario

Hello, I am Mario Hoffmann, Software-Engineer by profession with a big heart for C/C++ and VHDL. My main focus is on embedded systems and FPGA-Design.

Favorite Languages

• C/C++
• VHDL
• Golang
• Python

Active projects

• gatemate-playground - Trying out the GateMateA1 FPGA from CologneChip¹. Trying to refactor the mrv32 into a pipelined CPU.
• polarfire_rgb_ledpanel Building a Scoreboard with the PolarFire SoC and Hub75 RGB Panels (The software repositories are not public yet)
• vibeboard Go frontend for my Scoreboard. Created with a lot of AI to try it out

Past projects

• mrv32 - New RISC-V CPU, trying to work towards higher max_f, have cleaner code and possibly make it pipelined. Currently able to run the RV32i instrunction set.
  • mrv32_soc - A very basic System-On-Chip to test the CPU on a real Hardware (ECP5 for now).
• miniRV32 - Small RISC-V CPU implementing the RV32i instruction set. My very first RISC-V testbench.
• ulx3s-sketches - Small collection of simple VHDL sketches (used on the ULX3S development board)

Old projects on GitHub

• atmega8-vga - Simple VGA output with an Atmega8 microcontroller
• pong_fpga - Pong-like game on a cheap FPGA development board in pure VHDL

Masterthesis

• "Entwurf und Implementierung eines Cache- und SDRAM-Controllers für eine ARMv4 Mikroarchitektur auf Xilinx Kintex FPGAs"
  • ARM SDRAM Core
  • The thesis can be found here: https://gitlab.com/hoffma/arm-sdram-core/-/blob/master/masterarbeit_hoffmann_555625.pdf (Hint: There is a typo on the cover. It was handed in 2022, not 2021).

The goal of this thesis was to design a Cache- and SDRAM-Controller for an ARMv4 microprocessor which was designed by another student.