Commit 7a41be25 authored by hmz007's avatar hmz007

u-boot: support for nanopc-t4 (7e64c9e)

Signed-off-by: 's avatarhmz007 <hmz007@gmail.com>
parent 59b3edc5
......@@ -905,6 +905,8 @@ endif
ifdef CONFIG_RKCHIP_RK3368
ifdef CONFIG_RKCHIP_PX5
RKCHIP ?= PX5
else ifdef CONFIG_RKCHIP_PX5_KERNEL4_4
RKCHIP ?= PX5KERNEL4.4
else ifdef CONFIG_RKCHIP_RK3368H
ifdef CONFIG_PRODUCT_MID
RKCHIP ?= RK3368H
......@@ -952,15 +954,8 @@ ifdef CONFIG_PRODUCT_ECHO
else
$(if $(CONFIG_MERGER_MINILOADER), ./tools/boot_merger ./tools/rk_tools/RKBOOT/$(RKCHIP)MINIALL.ini)
endif
ifdef CONFIG_MERGER_TRUSTIMAGE_DRM
$(if $(CONFIG_MERGER_TRUSTIMAGE), ./tools/trust_merger $(if $(CONFIG_RK_TRUSTOS), --subfix) \
./tools/rk_tools/RKTRUST/$(RKCHIP)TRUST_DRM.ini)
else
$(if $(CONFIG_MERGER_TRUSTIMAGE), ./tools/trust_merger $(if $(CONFIG_RK_TRUSTOS), --subfix) \
./tools/rk_tools/RKTRUST/$(RKCHIP)TRUST.ini)
endif
ifeq ($(CONFIG_MERGER_TRUSTOS)$(CONFIG_MERGER_TRUSTOS_WITH_TA),yy)
$(if $(CONFIG_MERGER_TRUSTOS), ./tools/loaderimage --pack --trustos $(RK_TOS_BIN) trust.img)
$(if $(CONFIG_MERGER_TRUSTOS_WITH_TA), ./tools/loaderimage --pack --trustos $(RK_TOS_TA_BIN) trust_with_ta.img)
......
......@@ -18,7 +18,7 @@ DECLARE_GLOBAL_DATA_PTR;
#define CONFIG_RKCLK_APLL_FREQ 600000 /* KHZ */
#define CONFIG_RKCLK_APLL_FREQ_HIGH 1200000 /* KHZ */
#define CONFIG_RKCLK_GPLL_FREQ 491520 /* KHZ */
#define CONFIG_RKCLK_CPLL_FREQ 594000 /* KHZ */
#define CONFIG_RKCLK_CPLL_FREQ 1200000 /* KHZ */
#define CONFIG_RKCLK_NPLL_FREQ 594000 /* KHZ */
......@@ -152,6 +152,7 @@ static struct pll_clk_set gpll_clks[] = {
/* cpll clock table, should be from high to low */
static struct pll_clk_set cpll_clks[] = {
/* _mhz, _refdiv, _fbdiv, _postdiv1, _postdiv2, _dsmpd, _frac */
_CPLL_SET_CLKS(1200000, 1, 100, 2, 1, 1, 0),
_CPLL_SET_CLKS(750000, 2, 125, 2, 1, 1, 0),
_CPLL_SET_CLKS(594000, 2, 99, 2, 1, 1, 0),
_CPLL_SET_CLKS(400000, 6, 200, 2, 1, 1, 0),
......@@ -511,9 +512,10 @@ void rkclk_set_pll_rate_by_id(enum rk_plls_id pll_id, uint32 mHz)
/*
* rkplat clock set apll a high frequency
*/
void rkclk_set_apll_high(void)
int rkclk_set_apll_high(void)
{
rkclk_pll_set_rate(APLL_ID, CONFIG_RKCLK_APLL_FREQ_HIGH, rkclk_apll_cb);
return 1;
}
/*
......@@ -643,7 +645,7 @@ static int rkclk_vop_aclk_set(uint32 aclk_hz)
}
#define VIO_ACLK_MAX (300 * MHZ)
#define VIO_ACLK_MAX (400 * MHZ)
#define VIO_HCLK_MAX (100 * MHZ)
#define HDMIPHY_CLK_FREQ (594 * MHZ)
#define VOP_ACLK_MAX (500 * MHZ)
......@@ -669,6 +671,7 @@ static int rkclk_lcdc_aclk_config(uint32 lcdc_id, uint32 pll_sel, uint32 div)
con |= (0x1f << (0 + 16)) | ((div - 1) << 0);
cru_writel(con, CRU_CLKSELS_CON(37));
cru_writel(con, CRU_CLKSELS_CON(39));
return 0;
}
......
......@@ -229,8 +229,13 @@ int arch_cpu_init(void)
/* select 32KHz clock source */
pmugrf_writel((1 << (7 + 16)) | (0 << 7), PMU_GRF_SOC_CON0);
/* enable force to jtag */
grf_writel((0x01 << 13) | (0x01 << (13 + 16)), GRF_SOC_CON15);
#if defined(CONFIG_RKCHIP_PX5) || defined (CONFIG_RKCHIP_PX5_KERNEL4_4)
/* disable force to jtag */
grf_writel((0x0 << 13) | (0x01 << (13 + 16)), GRF_SOC_CON15);
#else
/* enable force to jtag */
grf_writel((0x01 << 13) | (0x01 << (13 + 16)), GRF_SOC_CON15);
#endif
#endif /* CONFIG_RKCHIP_RK3368 */
#if defined(CONFIG_RKCHIP_RK3399)
......@@ -261,7 +266,7 @@ int print_cpuinfo(void)
#if defined(CONFIG_RKCHIP_RK3368)
if (gd->arch.chiptype == CONFIG_RK3368)
#if defined(CONFIG_RKCHIP_PX5)
#if defined(CONFIG_RKCHIP_PX5) || defined (CONFIG_RKCHIP_PX5_KERNEL4_4)
printf("CPU: px5\n");
#elif defined(CONFIG_RKCHIP_RK3368H)
#if defined(CONFIG_PRODUCT_BOX)
......
......@@ -170,6 +170,41 @@ void FW_NandDeInit(void)
#endif
}
#if defined(CONFIG_RKCHIP_RK3399)
static void rk3399_uart2usb(uint32 en)
{
if (en) {
#ifdef CONFIG_RKUART2USB_FORCE
/*
* Note: if define force enable usb to uart, maybe usb
* function will be affected.
*
* To use UART function:
* 1. Put the USB PHY in suspend mode and opmode is normal;
* 2. Set bypasssel to 1'b1 and bypassdmen to 1'b1;
*/
/* suspend usb phy */
grf_writel(0x000f0001, GRF_USB20PHY0_CON(1));
/* enable usb bypass uart */
grf_writel(0x000c000c, GRF_USB20PHY0_CON(0));
#else
con = grf_readl(GRF_SOC_STATUS3);
/* If vbus is low and iddig is high, then enable bypass */
if (!(con & (1 << 12)) && (con & (1 << 8))) {
grf_writel(0x000f0001, GRF_USB20PHY0_CON(1));
grf_writel(0x000c000c, GRF_USB20PHY0_CON(0));
}
#endif /* CONFIG_RKUART2USB_FORCE */
} else {
/* disable usb bypass uart */
grf_writel(0x000c0000, GRF_USB20PHY0_CON(0));
/* resume usb phy */
grf_writel(0x000f0002, GRF_USB20PHY0_CON(1));
/* waiting for the utmi_clk to become stable */
DRVDelayMs(2);
}
}
#endif
#if defined(CONFIG_RKCHIP_RK3368) || defined(CONFIG_RKCHIP_RK3366)
static void rk3368_uart2usb(uint32 en)
......@@ -276,7 +311,9 @@ void rkplat_uart2UsbEn(uint32 en)
rk312X_uart2usb(en);
#elif defined(CONFIG_RKCHIP_RK3368) || defined(CONFIG_RKCHIP_RK3366)
rk3368_uart2usb(en);
#elif defined(CONFIG_RKCHIP_RK322X) || defined(CONFIG_RKCHIP_RK3399) || defined(CONFIG_RKCHIP_RK322XH)
#elif defined(CONFIG_RKCHIP_RK3399)
rk3399_uart2usb(en);
#elif defined(CONFIG_RKCHIP_RK322X) || defined(CONFIG_RKCHIP_RK322XH)
/* no support uart to usb */
#else
#error "PLS config rk chip if support uart2usb."
......
......@@ -747,6 +747,16 @@ void rkimage_prepare_fdt(void)
return;
}
#endif
content = rkimage_load_fdt(get_disk_partition(RECOVERY_NAME));
if (!content.load_addr) {
debug("Failed to prepare fdt from recovery!\n");
} else {
printf("Load FDT from recovery image.\n");
gd->fdt_blob = content.load_addr;
gd->fdt_size = content.content_size;
return;
}
#endif
}
......@@ -557,7 +557,7 @@ bool StorageUMSBootMode(void)
}
#endif
static struct vendor_info g_vendor;
static struct vendor_info g_vendor __attribute__((aligned(ARCH_DMA_MINALIGN)));
static int vendor_ops(u8 *buffer, u32 addr, u32 n_sec, int write)
{
......
......@@ -42,6 +42,13 @@
#define VENDOR_TAG 0x524B5644
#define VENDOR_PART_SIZE 128
#define VENDOR_SN_ID 1
#define VENDOR_WIFI_MAC_ID 2
#define VENDOR_LAN_MAC_ID 3
#define VENDOR_BLUETOOTH_ID 4
#define VENDOR_IMEI_ID 5
#define VENDOR_OEM_UNLOCKED_ID 6
struct vendor_item {
u16 id;
u16 offset;
......
......@@ -19,9 +19,9 @@
DECLARE_GLOBAL_DATA_PTR;
void __weak rkclk_set_apll_high(void)
int __weak rkclk_set_apll_high(void)
{
return 0;
}
static ulong get_sp(void)
......@@ -197,8 +197,8 @@ int board_late_init(void)
debug("pwm_regulator_init\n");
pwm_regulator_init();
#endif
rkclk_set_apll_high();
rkclk_dump_pll();
if (rkclk_set_apll_high())
rkclk_dump_pll();
debug("fg_init\n");
fg_init(0); /*fuel gauge init*/
debug("charger init\n");
......
......@@ -12,6 +12,7 @@
#include <malloc.h>
#include <../board/rockchip/common/config.h>
#include <generated/timestamp_autogenerated.h>
#include <../board/rockchip/common/storage/storage.h>
DECLARE_GLOBAL_DATA_PTR;
......@@ -476,6 +477,10 @@ static void rk_commandline_setenv(const char *boot_name, rk_boot_img_hdr *hdr, b
uint32 media = StorageGetBootMedia();
/* Storage Media Name */
char *medianame = NULL;
/* read oem_lock from vendor storage */
int vendor_ret = vendor_storage_init();
/* OEM flash lock, default is locked */
char *oem_unlocked = "0";
/* Use the cmdline from board_fbt_finalize_bootargs instead of
* any hardcoded into u-boot. Also, Android wants the
......@@ -502,6 +507,17 @@ static void rk_commandline_setenv(const char *boot_name, rk_boot_img_hdr *hdr, b
else if (media == BOOT_FROM_NVME)
medianame = "nvme";
if (vendor_ret != 0)
printf("error init vendor storage.\n");
/* write oem_unlocked to cmdline if successful read */
if (vendor_storage_read(VENDOR_OEM_UNLOCKED_ID, oem_unlocked, 512) < 0)
printf("vendor read error!\nSet oem_unlocked=0");
else
snprintf(command_line, sizeof(command_line),
"%s androidboot.oem_unlocked=%s",
command_line, oem_unlocked);
if (medianame != NULL) {
snprintf(command_line, sizeof(command_line),
"%s storagemedia=%s", command_line, medianame);
......
......@@ -14,7 +14,7 @@
#include <common.h>
#include <command.h>
#include <exports.h>
#include <memalign.h>
#include <nand.h>
#include <onenand_uboot.h>
#include <linux/mtd/mtd.h>
......
......@@ -1012,6 +1012,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
ushort *cmap = tmpmap;
struct fb_dsp_info fb_info;
u8 format = RGB565;
int dsp_black = 0;
#endif
#endif
ushort *cmap_base = NULL;
......@@ -1020,7 +1021,7 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
bmp_image_t *bmp = (bmp_image_t *)map_sysmem(bmp_image, 0);
uchar *bmap;
ushort padded_width;
unsigned long width, height, byte_width;
unsigned long width, height, byte_width, image_size;
unsigned long pwidth = panel_info.vl_col;
unsigned colors, bpix, bmp_bpix;
......@@ -1034,6 +1035,16 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
width = get_unaligned_le32(&bmp->header.width);
height = get_unaligned_le32(&bmp->header.height);
bmp_bpix = get_unaligned_le16(&bmp->header.bit_count);
image_size = get_unaligned_le32(&bmp->header.image_size);
#if defined(CONFIG_RK_FB)
if (image_size > CONFIG_MAX_BMP_BLOCKS * BLOCK_SIZE) {
dsp_black = 1;
printf("Error: image file size(%lu Bytes) exceed(%lu Bytes)\n",
image_size, (CONFIG_MAX_BMP_BLOCKS * BLOCK_SIZE));
goto out;
}
#endif
colors = 1 << bmp_bpix;
......@@ -1053,8 +1064,16 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
format = ARGB888;
break;
default:
printf("Error: no support this bmp bpix%d\n",bmp_bpix);
return -1;
printf("Error: no support this bmp bpix:%d\n",bmp_bpix);
dsp_black = 1;
goto out;
}
if (width * height * bpix > CONFIG_RK_FB_SIZE * 8) {
dsp_black = 1;
printf("Error: no support this bmp resolution: %dx%dx%d\n",
width, height, bpix);
goto out;
}
#else
bpix = NBITS(panel_info.vl_bpix);
......@@ -1252,6 +1271,20 @@ int lcd_display_bitmap(ulong bmp_image, int x, int y)
};
#if defined(CONFIG_RK_FB)
out:
if (dsp_black) {
x = 0;
y = 0;
width = 1920;
height = 1080;
bpix = 24;
format = RGB888;
fb_info.ymirror = 0;
lcd_base = (void *)gd->fb_base;
lcd_base = (void *) ALIGN((ulong)lcd_base, CONFIG_LCD_ALIGNMENT);
lcd_line_length = (width * bpix) / 8;
memset(lcd_base, 0, lcd_line_length * height);
}
#ifdef CONFIG_DIRECT_LOGO
display:
#endif
......
......@@ -300,7 +300,7 @@ struct bmp_header *get_bmp_header(const char *bmp_name)
const disk_partition_t *ptn = get_disk_partition(LOGO_NAME);
struct bmp_header *bmp;
bmp = malloc(BLOCK_SIZE);
bmp = memalign(ARCH_DMA_MINALIGN, BLOCK_SIZE);
if (!bmp)
return NULL;
......
CONFIG_SYS_EXTRA_OPTIONS="RKCHIP_PX5_KERNEL4_4,RKCHIP_RK3368,PRODUCT_MID,NORMAL_WORLD,SECOND_LEVEL_BOOTLOADER,UART_NUM=UART_CH4"
CONFIG_ARM=y
CONFIG_ROCKCHIP_ARCH64=y
CONFIG_PLAT_RK33XX=y
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
......@@ -6,6 +6,7 @@
#
obj-$(CONFIG_RK_I2C) += rk_i2c.o
obj-$(CONFIG_RK_I2C_GPIO) += i2c-gpio.o
obj-$(CONFIG_BFIN_TWI_I2C) += bfin-twi_i2c.o
obj-$(CONFIG_DW_I2C) += designware_i2c.o
......
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......@@ -23,6 +23,7 @@
#include <command.h>
#include <watchdog.h>
#include <malloc.h>
#include <memalign.h>
#include <div64.h>
#include <asm/errno.h>
......
......@@ -387,11 +387,28 @@ static uoc_field_t rockchip_rk3399_usb2phy_inno[] = {
[INNO_BC_DCPDET] = { {0xe2ac, 1, 1} },
};
static uoc_field_t rockchip_rk3126_usb2phy_inno[] = {
[INNO_BC_BVALID] = { {0x14c, 5, 1} },
[INNO_BC_IDDIG] = { {0x14c, 8, 1} },
[INNO_BC_VDMSRCEN] = { {0x184, 12, 1} },
[INNO_BC_VDPSRCEN] = { {0x184, 11, 1} },
[INNO_BC_RDMPDEN] = { {0x184, 10, 1} },
[INNO_BC_IDPSRCEN] = { {0x184, 9, 1} },
[INNO_BC_IDMSINKEN] = { {0x184, 8, 1} },
[INNO_BC_IDPSINKEN] = { {0x184, 7, 1} },
[INNO_BC_DPATTACH] = { {0x2c0, 7, 1} },
[INNO_BC_CPDET] = { {0x2c0, 6, 1} },
[INNO_BC_DCPDET] = { {0x2c0, 5, 1} },
};
static int usb_battery_charger_init_nofdt(const char *phy)
{
if (strcmp(phy, "RK3399,inno,usb2phy") == 0) {
P_BC_UOC_FIELDS = rockchip_rk3399_usb2phy_inno;
gusb_bc_type = USB_BC_INNO;
} else if (strcmp(phy, "RK3126,inno,usb2phy") == 0) {
P_BC_UOC_FIELDS = rockchip_rk3126_usb2phy_inno;
gusb_bc_type = USB_BC_INNO;
} else {
return -1;
}
......@@ -429,6 +446,9 @@ static void usb_battery_charger_init(void)
#endif
#ifdef CONFIG_RKCHIP_RK3399
usb_battery_charger_init_nofdt("RK3399,inno,usb2phy");
#endif
#ifdef CONFIG_RKCHIP_RK3126
usb_battery_charger_init_nofdt("RK3126,inno,usb2phy");
#endif
}
}
......
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This diff is collapsed.
......@@ -34,6 +34,7 @@
#error "PLS config usb3 base!"
#endif
extern void rockusb_disable(struct usb_gadget *gadget);
extern void rkplat_uart2UsbEn(uint32 en);
static struct dwc3_device dwc3_device_data;
static struct usb_endpoint_descriptor dwc3_gadget_ep0_desc = {
......@@ -3060,6 +3061,7 @@ int rk_dwc3_connect(void)
DWC_PRINT("rk_dwc3_connect in.\n");
int ret;
/* usbphy_tunning(); */
rkplat_uart2UsbEn(0);
ret = dwc3_uboot_init(&dwc3_device_data);
if (ret) {
......
......@@ -97,10 +97,10 @@ static int panel_simple_parse_dt(const void *blob, int node,
fdtdec_decode_gpio(blob, node, "enable-gpios", enable_gpio);
panel->delay_prepare = fdtdec_get_int(blob, node, "delay,prepare", 0);
panel->delay_unprepare = fdtdec_get_int(blob, node, "delay,unprepare", 0);
panel->delay_enable = fdtdec_get_int(blob, node, "delay,enable", 0);
panel->delay_disable = fdtdec_get_int(blob, node, "delay,disable", 0);
panel->delay_prepare = fdtdec_get_int(blob, node, "prepare-delay-ms", 0);
panel->delay_unprepare = fdtdec_get_int(blob, node, "unprepare-delay-ms", 0);
panel->delay_enable = fdtdec_get_int(blob, node, "enable-delay-ms", 0);
panel->delay_disable = fdtdec_get_int(blob, node, "disable-delay-ms", 0);
panel->bus_format = fdtdec_get_int(blob, node, "bus-format", MEDIA_BUS_FMT_RBG888_1X24);
printf("delay prepare[%d] unprepare[%d] enable[%d] disable[%d]\n",
......
......@@ -147,7 +147,7 @@ static void tve_set_mode (int mode)
tve_writel(TV_SYNC_TIMING, 0x00C07a81);
tve_writel(TV_ADJ_TIMING, 0x96B40000);
tve_writel(TV_ACT_ST, 0x001500D6);
tve_writel(TV_ACT_TIMING, 0x169800FC);
tve_writel(TV_ACT_TIMING, 0x169800FC | (1 << 12) | (1 << 28));
} else if (mode == TVOUT_CVBS_PAL) {
tve_writel(TV_ROUTING, v_DAC_SENSE_EN(0) | v_Y_IRE_7_5(0) |
......
......@@ -948,9 +948,7 @@ static int rk32_hdmi_video_packetizer(struct hdmi_dev *hdmi_dev,
/*Config Color Depth*/
hdmi_msk_reg(hdmi_dev, VP_PR_CD,
m_COLOR_DEPTH, v_COLOR_DEPTH(color_depth));
/*Config pixel repettion*/
hdmi_msk_reg(hdmi_dev, VP_PR_CD, m_DESIRED_PR_FACTOR,
v_DESIRED_PR_FACTOR(hdmi_dev->pixelrepeat - 1));
if (hdmi_dev->pixelrepeat > 1)
hdmi_msk_reg(hdmi_dev, VP_CONF,
m_PIXEL_REPET_EN | m_BYPASS_SEL,
......@@ -2058,21 +2056,276 @@ static int hdmi_dev_insert(struct hdmi_dev *hdmi_dev)
return HDMI_ERROR_SUCESS;
}
static void hdmi_dev_config_aai(struct hdmi_dev *hdmi_dev,
struct hdmi_audio *audio)
{
/* Refer to CEA861-E Audio infoFrame
* Set both Audio Channel Count and Audio Coding
* Type Refer to Stream Head for HDMI
*/
hdmi_msk_reg(hdmi_dev, FC_AUDICONF0,
m_FC_CHN_CNT | m_FC_CODING_TYPE,
v_FC_CHN_CNT(audio->channel - 1) | v_FC_CODING_TYPE(0));
/* Set both Audio Sample Size and Sample Frequency
* Refer to Stream Head for HDMI
*/
hdmi_msk_reg(hdmi_dev, FC_AUDICONF1,
m_FC_SAMPLE_SIZE | m_FC_SAMPLE_FREQ,
v_FC_SAMPLE_SIZE(0) | v_FC_SAMPLE_FREQ(0));
/* Set Channel Allocation */
hdmi_writel(hdmi_dev, FC_AUDICONF2, 0x00);
/* Set LFEPBLDOWN-MIX INH and LSV */
hdmi_writel(hdmi_dev, FC_AUDICONF3, 0x00);
}
static int hdmi_dev_config_audio(struct hdmi_dev *hdmi_dev,
struct hdmi_audio *audio)
{
int word_length = 0, channel = 0, mclk_fs;
unsigned int N = 0, CTS = 0;
int rate = 0;
printf("%s\n", __func__);
if (audio->channel < 3)
channel = I2S_CHANNEL_1_2;
else if (audio->channel < 5)
channel = I2S_CHANNEL_3_4;
else if (audio->channel < 7)
channel = I2S_CHANNEL_5_6;
else
channel = I2S_CHANNEL_7_8;
switch (audio->rate) {
case HDMI_AUDIO_FS_32000:
mclk_fs = FS_128;
rate = AUDIO_32K;
if (hdmi_dev->tmdsclk >= 594000000)
N = N_32K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_32K_MIDCLK;
else
N = N_32K_LOWCLK;
/*div a num to avoid the value is exceed 2^32(int)*/
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 1000, 32);
break;
case HDMI_AUDIO_FS_44100:
mclk_fs = FS_128;
rate = AUDIO_441K;
if (hdmi_dev->tmdsclk >= 594000000)
N = N_441K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_441K_MIDCLK;
else
N = N_441K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 100, 441);
break;
case HDMI_AUDIO_FS_48000:
mclk_fs = FS_128;
printf("HDMI_AUDIO_FS_48000\n");
rate = AUDIO_48K;
if (hdmi_dev->tmdsclk >= 594000000) /*FS_153.6*/
N = N_48K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_48K_MIDCLK;
else
N = N_48K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 1000, 48);
break;
case HDMI_AUDIO_FS_88200:
mclk_fs = FS_128;
rate = AUDIO_882K;
if (hdmi_dev->tmdsclk >= 594000000)
N = N_882K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_882K_MIDCLK;
else
N = N_882K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 100, 882);
break;
case HDMI_AUDIO_FS_96000:
mclk_fs = FS_128;
rate = AUDIO_96K;
if (hdmi_dev->tmdsclk >= 594000000) /*FS_153.6*/
N = N_96K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_96K_MIDCLK;
else
N = N_96K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 1000, 96);
break;
case HDMI_AUDIO_FS_176400:
mclk_fs = FS_128;
rate = AUDIO_1764K;
if (hdmi_dev->tmdsclk >= 594000000)
N = N_1764K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_1764K_MIDCLK;
else
N = N_1764K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 100, 1764);
break;
case HDMI_AUDIO_FS_192000:
mclk_fs = FS_128;
rate = AUDIO_192K;
if (hdmi_dev->tmdsclk >= 594000000) /*FS_153.6*/
N = N_192K_HIGHCLK;
else if (hdmi_dev->tmdsclk >= 297000000)
N = N_192K_MIDCLK;
else
N = N_192K_LOWCLK;
CTS = CALC_CTS(N, hdmi_dev->tmdsclk / 1000, 192);
break;
default:
printf(
"[%s] not support such sample rate %d\n",
__func__, audio->rate);
return -ENOENT;
}
switch (audio->word_length) {
case HDMI_AUDIO_WORD_LENGTH_16bit:
word_length = I2S_16BIT_SAMPLE;
break;
case HDMI_AUDIO_WORD_LENGTH_20bit:
word_length = I2S_20BIT_SAMPLE;
break;
case HDMI_AUDIO_WORD_LENGTH_24bit:
word_length = I2S_24BIT_SAMPLE;
break;
default:
word_length = I2S_16BIT_SAMPLE;
}
printf("rate = %d, tmdsclk = %u, N = %d, CTS = %d\n",
audio->rate, hdmi_dev->tmdsclk, N, CTS);
/* more than 2 channels => layout 1 else layout 0 */
hdmi_msk_reg(hdmi_dev, FC_AUDSCONF,
m_AUD_PACK_LAYOUT,
v_AUD_PACK_LAYOUT((audio->channel > 2) ? 1 : 0));
/*Mask fifo empty and full int and reset fifo*/
hdmi_msk_reg(hdmi_dev, AUD_INT,
m_FIFO_EMPTY_MASK | m_FIFO_FULL_MASK,
v_FIFO_EMPTY_MASK(1) | v_FIFO_FULL_MASK(1));
hdmi_msk_reg(hdmi_dev, AUD_CONF0,
m_SW_AUD_FIFO_RST, v_SW_AUD_FIFO_RST(1));
hdmi_writel(hdmi_dev, MC_SWRSTZREQ, 0xF7);
udelay(100);
/*
* when we try to use hdmi nlpcm mode
* we should use set AUD_CONF2 to open this route and set
* word_length to 24bit for b.p.c.u.v with 16bit raw data
* when the bitstream data up to 8 channel, we should use
* the hdmi hbr mode
* HBR Mode : Dolby TrueHD
* Dolby Atmos
* DTS-HDMA
* NLPCM Mode :
* FS_32000 FS_44100 FS_48000 : Dolby Digital & DTS
* FS_176400 FS_192000 : Dolby Digital Plus
*/
if (audio->type == HDMI_AUDIO_NLPCM) {
printf("HDMI_AUDIO_NLPCM\n");
if (channel == I2S_CHANNEL_7_8) {
HDMIDBG(2, "hbr mode.\n");
hdmi_writel(hdmi_dev, AUD_CONF2, 0x1);
word_length = I2S_24BIT_SAMPLE;
} else if ((audio->rate == HDMI_AUDIO_FS_32000) ||
(audio->rate == HDMI_AUDIO_FS_44100) ||