Hello, I translated the register definitions and startup code to freepascal. Also I (locally) modified the fpc files to compile for the CH32V307 and successfully tested a smaller programm with UART including a receive interrupt. Can someone help me to add it to freepascal please? This 4 files go into rtl/embedded/riscv32: [ch32CoreRiscv_header.inc](/uploads/e82863bda1c74281e0320ce0686cda94/ch32CoreRiscv_header.inc) [ch32CoreRiscv_impl.inc](/uploads/4ea084bd991090d2df790a2043cdd0b8/ch32CoreRiscv_impl.inc) [ch32v303.pp](/uploads/5130f5472752467524c72641f7c05fdf/ch32v303.pp) [ch32v307.pp](/uploads/9757c6da4c5dcdffb8a892ee2be8e377/ch32v307.pp) Here the modified version of rtl/embedded/makefile.fpc (Only line 214 is modified) [Makefile.fpc](/uploads/ad618b7fbf22d57a1bf9b96e70b15769/Makefile.fpc) Here the makefile (in rtl/embedded) updated with fpcmake: [Makefile](/uploads/303e51b940f080b8a14a554096f579ca/Makefile) Here the modified version of compiler/riscv32/cpuinfo.pas. Added lines 73 to 81 and 124 to 132. [cpuinfo.pas](/uploads/2174925fca63306465570de1cf6cad45/cpuinfo.pas) The changes are based on the fpc-main source loaded about 1 hour before (12.06.2022 12:30). Thank You!