RISC-V Embedded, procedure epilogue conflicts with interrupts.
Original Reporter info from Mantis: Bernd
-
Reporter name: Bernd
Original Reporter info from Mantis: Bernd
- Reporter name: Bernd
Description:
An empty dummy procedure compiles to the following assembler output:
# [145] begin
addi x2,x2,-8
sw x1,4(x2)
sw x8,0(x2)
addi x8,x2,8
addi x2,x2,-52
# [146] end;
addi x2,x8,0 // resets stack pointer
// An Interrupt here leads to a crash
lw x8,-8(x2)
lw x1,-4(x2)
jalr x0,x1
When the stack pointer is reset to its origin in the epilogue of the procedure, there are still two registers at location -8(x2) and -4(x2) which have to be restored. If an interrupt occurs right after the addi x2,x8,0 instruction, it will overwrite these two locations with its own stack frame and the program is going to crash on interrupt return.
Mantis conversion info:
- Mantis ID: 38348
- OS: Embedded
- Build: 47832
- Platform: RISC-V
- Version: 3.3.1