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Update 1 Introduction
authored
May 06, 2017
by
Christian Gagneraud
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1-Qucs-code-analysis/1-Introduction.md
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@@ -12,3 +12,8 @@ I have done these analyses using:
-
[
QtCreator
](
http://doc.qt.io/qtcreator/
)
IDE
Enjoy and feel free to contribute.
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TODO:
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Add a dedicated page for VHDL, Verilog and Verilog-A? As they have different requirements
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There is a seperate VerilogAwriter class