Commit 13158803 authored by Cerlane's avatar Cerlane

bug fixes for type conversions to more than 16-bits

parent 2052def0
This diff is collapsed.
......@@ -44,8 +44,8 @@ posit32_t p16_to_p32( posit16_t pA ) {
union ui16_p16 uA;
union ui32_p32 uZ;
uint_fast16_t uiA, tmp, regime;
uint_fast32_t exp_frac32A=0;
uint_fast16_t uiA, tmp;
uint_fast32_t exp_frac32A=0, regime;
bool sign, regSA;
int_fast8_t kA=0, regA;
......@@ -77,7 +77,8 @@ posit32_t p16_to_p32( posit16_t pA ) {
}
tmp&=0x7FFF;
}
exp_frac32A = tmp<<16;
exp_frac32A = (uint32_t) tmp<<16;
if(kA<0){
regA = -kA;
......@@ -94,6 +95,7 @@ posit32_t p16_to_p32( posit16_t pA ) {
regSA=1;
regime = 0x7FFFFFFF - (0x7FFFFFFF>>regA);
}
exp_frac32A >>=(regA+2); //2 because of sign and regime terminating bit
......
......@@ -44,8 +44,8 @@ posit_1_t p16_to_pX1( posit16_t pA, int x ) {
union ui16_p16 uA;
union ui32_pX1 uZ;
uint_fast16_t uiA, tmp, regime;
uint_fast32_t exp_frac32A=0;
uint_fast16_t tmp;
uint_fast32_t uiA, exp_frac32A=0, regime;
bool sign, regSA;
int_fast8_t kA=0, regA;
......@@ -55,7 +55,7 @@ posit_1_t p16_to_pX1( posit16_t pA, int x ) {
}
uA.p = pA;
uiA = (uA.ui<<16) &0xFFFFFFFF;
uiA = ((uint32_t) uA.ui<<16) &0xFFFFFFFF;
if (uiA==0x80000000 || uiA==0 ){
uZ.ui = uiA;
......
......@@ -44,8 +44,8 @@ posit_2_t p16_to_pX2( posit16_t pA, int x ) {
union ui16_p16 uA;
union ui32_pX2 uZ;
uint_fast16_t uiA, tmp, regime;
uint_fast32_t exp_frac32A=0;
uint_fast16_t uiA, tmp;
uint_fast32_t exp_frac32A=0, regime;
bool sign, regSA;
int_fast8_t kA=0, regA;
......@@ -87,7 +87,7 @@ posit_2_t p16_to_pX2( posit16_t pA, int x ) {
}
tmp&=0x7FFF;
}
exp_frac32A = tmp<<16;
exp_frac32A = (uint32_t) tmp<<16;
if(kA<0){
regA = -kA;
......
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