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v1.3-rc6

HFI BIOS 1.3-rc6 -- PCIe comes up, and the panel comes up first

The board has three root complexes and the BIOS had been reporting "PCI: 0
device(s)" over all of them, because PCI had never been enabled for this
target. It is now: the x4 M.2 slot, a Realtek RTL8127 10GbE at Gen3-x2 and an
RTL8852BE Wi-Fi at Gen1-x1, the latter two enumerating on hardware. Getting
there took three fixes, and the one that mattered was invisible from the
source: nothing in our boot chain muxed the pads carrying PERST# and CLKREQ#,
so every endpoint stayed in reset while the PHY reported perfect health. The
other two were inverted conditions in the vendor driver, one of which left
every root complex configured as an endpoint.

With PCIe running before the front-end, an empty M.2 slot spends three seconds
timing out, and the screen used to be dark for all of it. The VideoBIOS
bring-up now happens during init rather than from the main loop, so the panel
is lit while the machine works through the rest of its devices -- which is
what a PC does, and which makes the boot feel like a different machine.

Set-Up also stops saying it does not know the board's Ethernet address. It is
in the identity EEPROM and always was.

All four patch series are renumbered sequentially, the references to them in
the sources now name their directory, and the box-drawing glyphs every framed
screen uses are defined once rather than in six files.

Everything here is verified on the hardware it was written for, cold from NOR.

v1.3-rc5

HFI BIOS 1.3-rc5 -- Set-Up tells the truth about this board

rc4 lit the panel; this one fills in everything Set-Up had been unable to say
about the machine it was running on. Four pages that were blank, wrong or
quietly misleading, and in every case the fix was less about new capability
than about firmware checking a claim before making it.

SYSTEM INFORMATION described a processor it did not have. "%d x SiFive U74" was
a constant with a count in front of it, true of every board this BIOS had run
on until it ran on one where it was not -- the K3 reported sixteen SiFive U74s,
a part it contains none of. It is now walked from the device tree with runs
collapsed, "8 x SpaceMiT X100 + 8 x SpaceMiT A100", sharing the POST's naming
so the two cannot drift. The PCI row, which read "0 device(s)" on a board with
an M.2 slot, is gone where there is no bus to count: that number was never
"none found", it was "never looked". And the board's own identity -- PCB
revision, serial number -- comes out of the ONIE TLV EEPROM on i2c2, which
needed the SpaceMiT I2C controller ported to reach.

PC HEALTH STATUS reported nothing, on a SoC with eight temperature sensors. It
now shows all seven that are populated, named as the vendor's thermal zones
name them, and the page grew a sensor list so the Unmatched keeps its two rows
without a second copy of the same panel.

STANDARD SETTINGS had no clock, then the wrong one. The SoC's mrvl,mmp-rtc
block ticks and takes writes but zeroes at every reset -- and Linux never binds
it, which was the clue that it had never been this board's clock. The date that
persists lives in an always-on controller, reached over SBI MPXY and RPMI's RTC
service group, and that is what Set-Up reads and writes now; the SoC counter
remains behind it as a fallback. The page also learned to say which field is
the day, having silently stored the 8th of July for someone who typed the 7th
of August, and to refuse loudly rather than quietly.

Hardware: cold boot from NOR to a Bianbu desktop, with every Set-Up page above
verified on the panel.

v1.3-rc4

HFI BIOS 1.3-rc4 -- the panel lights from a cold start

The K3 cold-boots to a picture. rc3 reached the desktop but the firmware's own
screen stayed dark the whole way: AUX dead, no EDID, no DPCD, link training
failing every boot. Both of the reasons turned out to be one register each, and
neither was in the display code.

DisplayPort's hot plug detect arrives on an ordinary pad, and a pad comes out of
a cold reset selecting function 0. Nothing below the VideoBIOS module claims it,
so HPD read low forever and a monitor that had been plugged in the whole time
looked like an empty connector. Warm boots inherited the mux from whatever ran
before, which is why only the cold path found it. Measured at the prompt: the
HPD register reads all zero cold, and one write to the pad brings up both the
level and the plug-edge latch -- the sink announcing itself for the first time.

The device tree in the FIT belongs to OpenSBI, not to U-Boot. The FSBL hands it
over and OpenSBI enumerates the machine from it, so a tree with no per-hart
interrupt controllers and no CLINT leaves it with one usable hart -- and then
hart state management has nothing to lend a VideoBIOS module, Linux is refused
fifteen times and reaches userspace with one CPU, and the CoreSight blocks whose
clocks are set in per-hart M-mode init fault when probed. The FIT now carries
the factory control tree, which is what the vendor FSBL and OpenSBI were built
against.

Both faults used to be reported as their last symptom rather than their cause,
so the module now separates no-HPD from a dead AUX channel from a sink that
refuses, and a mode programmed against a link that never trained is flagged
VBM_MODE_NO_LINK instead of being announced as a working display.

Hardware: cold power-on from NOR to BIOS with screen and keyboard, through
mr-bml, to a fully booted Bianbu desktop.

v1.3-rc3

HFI BIOS 1.3-rc3 -- the K3 cold-starts

The K3 boots HFI BIOS from NOR as the real second stage. Until today every
working run on this board had entered via `go` from a fully-booted vendor
U-Boot, which had already brought up 623 devices on our behalf; booted for
real -- BootROM, on-chip FSBL, OpenSBI, us in S-mode -- it produced nothing at
all. It now runs the full POST, and Bianbu boots through mr-bml to its desktop.

Two things had to be true at once, and neither was.

The FIT's device tree must be aligned. The SPL places it at (load address +
U-Boot's size) with no rounding and hands that pointer straight to OpenSBI,
which reads its console from that tree; an odd-sized U-Boot therefore yields
firmware that cannot say why it stopped. The payload is now padded to a page.

And the peripherals need clocks. Every K3 node used to say "clocks/resets
omitted -- the prior boot stage already enabled them", which was an accurate
description of the warm path and a false one everywhere else. The vendor's
CCU and reset drivers are ported, K3 only, and UFS and both USB wrappers are
wired to them: UFS reaches gear=[3,3] lane=[2,2] FAST MODE -- vendor parity --
and both USB buses enumerate.

Also here: the environment now persists in the NOR slot the vendor MTD layout
reserves for it, SBI sysreset gives EFI ResetSystem() something real to call,
and SpaceMiT's OpenSBI 1.9 K3 series is carried in patches/ so the stage below
us can be ours too.

The display is still dark. Its AUX channel never answers, so EDID and DPCD
both fail and link training never starts -- and that one is not a device-tree
matter: the VideoBIOS module programs the display in raw MMIO and never asks
the clock framework for anything. That is rc4.

Built from clean for all three targets.

v1.3-rc2

v1.3-rc1

v1.2

HFI BIOS 1.2

The QEMU platform stops being a shortcut. Delivered on top of 1.1:

* Whole-chain boot on QEMU, off a disk. The reset ROM enters our SPL, which
  brings up PCI, finds the NVMe drive and reads u-boot.itb -- OpenSBI
  fw_dynamic plus U-Boot proper -- off its EFI System Partition; OpenSBI then
  drops to S-mode into the BIOS. That is the Unmatched's SPL -> FIT -> OpenSBI
  -> U-Boot staging, differing only in the medium. Nothing is handed to the
  machine behind the firmware's back: no -kernel, and the RAM boot device is
  compiled out.

* The SPL finds the FIT by GPT partition type rather than by a fixed index
  (patch 0021), so one SPL boots both a bare firmware disk and a disk with a
  real layout -- including a K3-shaped GPT whose ESP is partition 7.

* Settings persist on QEMU. The environment lives in the machine's second CFI
  bank at 0x22000000 as pflash unit 1, so SAVE SETTINGS survives a power cycle
  exactly as it does through SPI NOR on the Unmatched.

* make qemu-disk / make qemu-vars build the boot disk (GPT + FAT32 ESP carrying
  the FIT, extensible via QEMU_ESP_FILES) and the blank settings chip.

* Set-Up no longer closes on a save that did not happen: a failed write is
  reported and the program stays open, so leaving the values unpersisted is
  the user's decision rather than a silent one.

* The U-Boot manifest and source-trimming helpers are now in the tree, so
  uboot_files_needed.txt can actually be regenerated.

v1.1

HFI BIOS 1.1

Second platform: QEMU virt (RVA23) + virtio-gpu -- HFI BIOS now runs with no
hardware at all. Delivered on top of 1.0:

  * Multi-target build: `make menuconfig` (or TARGET=) picks the platform
    (SiFive HiFive Unmatched / QEMU virt; SpaceMiT K3 pending) and the
    VideoBIOS module blob.
  * Capability-gated POST and Set-Up, identity derived from the device tree.
  * VBM loader ABI v3: PCI config-space access + present() driving the
    indirect virtio-gpu framebuffer.
  * LICENSE is now the verbatim GPL-2.0 text; README + CHANGELOG document 1.1.

Signed-off-by: Yuri Zaporozhets <yuriz@qsoe.net>

v1.0

v0.9

v0.8

v0.7

v0.6

HFI BIOS v0.6 -- persistent boot try-order + on-screen EFI console

Boot: persistent try-order bios_devbootorder (default "nvme,usb,mmc"); bios_boot() walks it and boots the first device whose ESP carries the EFI file. F11 offers nvme/usb/mmc as a one-shot override. Set-Up BOOT ORDER SELECT page (+/- reorder). HW-verified end-to-end (Debian RISC-V installer booted).
On-screen EFI console (hficon): a controller-agnostic stdio device that paints U-Boot's EFI ConOut ANSI stream onto the videobios_screen surface, so an EFI payload (GRUB, the Debian installer, mr-bml, a Linux EFI stub) shows its console on the screen. Gated by the "EFI console on screen" Advanced Settings toggle (default Disabled). Screen OR serial, never both; a payload arbitrates via the HfiScreenSink command variable (patch 0016). ANSI->VGA color fix (blue no longer red).
efi_loader (patch 0015): board_efi_console_size()/efi_console_get_size() report the native console geometry; the serial size is probed ONCE early at POST and cached, so it is never re-queried late (fixes the wrong size after a Set-Up / System Console session).

v0.5

HFI BIOS v0.5 -- Award-style POST screen, terminal-size & Stall timer fixes

POST: QSOE skimmer emblem + HFI banner + system-info block (Memory/Board/CPU/PCI); status-line idle countdown dots; Del-to-Setup hint gated on USB keyboard.
efi_loader (patches 0011/0012): short Stall() stays accurate (no ~7x payload-clock overshoot); CPR console-size reply timeout 100->500 ms (payloads no longer fall back to 80x25 after a console session).
Cleanup: biosui test command removed. Firmware ~928 KB.

v0.4

HFI BIOS v0.4 -- System Console, EFI-owned boot, native 16-bit text surface, size trims (-64 KB)

v0.3

fu740-bios v0.3 -- a logo rendered through transparent text cells

The RISC-V wordmark renders in the upper-right corner via TRANSPARENT controller
cells (handoff ABI 2): pixels painted into the framebuffer show through the live
text grid while POST text flows around them. Plus UI polish -- sleek menu frames
with key-help on the footer line, and a stable menu width. Verified on the
SiFive HiFive Unmatched + GK-208.

v0.2

fu740-bios v0.2 -- interactive text-mode BIOS UI

USB keyboard input proven and wired: F11 boot-device menu, F12 EFI-file
browser, DEL Set-Up placeholder, Pause halt. New BIOS/ui/ toolkit (window /
select / key primitives) with real box-drawing frames, arrow scroll markers,
and a live BootDev status field. Build config consolidated into
configs/fu740_bios_defconfig. Verified on the HiFive Unmatched + GK-208.

v0.1

fu740-bios v0.1 -- native GK-208 VideoBIOS + classic POST screen on the HiFive Unmatched