Commit e5938b4d authored by T-Firefly's avatar T-Firefly

Android: FFTools: add sd_mkupdate.sh

	this script is designed to make the SD card firmware
parent aa637710
#!/bin/bash
set -e
usage()
{
cat << EOF
usage:
$(basename $0) [update_img_name]
-n: dest update.img name, if have not this arg, there are an default name, like:
ROC-RK3328-CC_Android7.1_YYMMDD
NOTE: Run in the path of SDKROOT
EOF
if [ ! -z $1 ] ; then
exit $1
fi
}
if [ "${1:0:1}" == "-" ]; then
if [ "$1" == "-h" ]; then
usage 0
else
usage 1
fi
elif [ ! -z $1 ] ; then
UPDATE_USER_NAME=$1
fi
. build/envsetup.sh >/dev/null && setpaths
#set -x
TARGET_PRODUCT=`get_build_var TARGET_PRODUCT`
echo -e "TARGET_PRODUCT=$TARGET_PRODUCT\n"
TARGET_VERSION=`get_build_var PLATFORM_VERSION`
CMD_PATH=$(dirname $0)
IMAGE_SRC_CUR_PATH=rockdev/Image-$TARGET_PRODUCT
IMAGE_SRC_PATH=$(readlink -f $IMAGE_SRC_CUR_PATH)
LINK_IMAGE_PATH=Image
if [ ! -d ${IMAGE_SRC_CUR_PATH} ] ; then
echo "[ERROR]: Can't find image path: ${IMAGE_SRC_CUR_PATH}"
exit 1
fi
pushd $CMD_PATH > /dev/null
ln -sf ${IMAGE_SRC_PATH} ${LINK_IMAGE_PATH}
if [ -z "$UPDATE_USER_NAME" ] ; then
UPDADE_NAME_TMP="ROC-RK3328-CC_Android${TARGET_VERSION}_$(date -d today +%y%m%d)"
else
UPDADE_NAME_TMP="$UPDATE_USER_NAME"
fi
UPDADE_NAME="${LINK_IMAGE_PATH}/${UPDADE_NAME_TMP}.img"
GENERATE_IDBLOCK_DATA()
{
./boot_merger --gensdboot ${LINK_IMAGE_PATH}/MiniLoaderAll.bin
}
FLASH_IMAGR_TO_PARTITION()
{
./rkcrc -p ${LINK_IMAGE_PATH}/parameter.txt ${LINK_IMAGE_PATH}/parameter.img
dd if=${LINK_IMAGE_PATH}/parameter.img of=${UPDADE_NAME} seek=$(((0x000000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/uboot.img of=${UPDADE_NAME} seek=$(((0x002000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/trust.img of=${UPDADE_NAME} seek=$(((0x004000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/misc.img of=${UPDADE_NAME} seek=$(((0x008000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/resource.img of=${UPDADE_NAME} seek=$(((0x00A800 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/kernel.img of=${UPDADE_NAME} seek=$(((0x012000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/boot.img of=${UPDADE_NAME} seek=$(((0x022000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/recovery.img of=${UPDADE_NAME} seek=$(((0x032000 + 0x2000))) ibs=1M conv=sync,fsync
dd if=${LINK_IMAGE_PATH}/system.img of=${UPDADE_NAME} seek=$(((0x0AC000 + 0x2000))) ibs=1M conv=sync,fsync
rm -rf ${LINK_IMAGE_PATH}/parameter.img
rm -f ${LINK_IMAGE_PATH}
}
FLASH_LOADER()
{
GENERATE_IDBLOCK_DATA
dd if=SD.bin of=${UPDADE_NAME} seek=$(((0x0040 + 0x0000))) conv=sync,fsync
dd if=SD.bin of=${UPDADE_NAME} seek=$(((0x0040 + 0x0400))) conv=sync,fsync
dd if=SD.bin of=${UPDADE_NAME} seek=$(((0x0040 + 0x0800))) conv=sync,fsync
dd if=SD.bin of=${UPDADE_NAME} seek=$(((0x0040 + 0x0C00))) conv=sync,fsync
dd if=SD.bin of=${UPDADE_NAME} seek=$(((0x0040 + 0x1000))) conv=sync,fsync
rm -rf SD.bin
}
FLASH_LOADER
FLASH_IMAGR_TO_PARTITION
popd > /dev/null
#xz -k -z ${IMAGE_SRC_CUR_PATH}/${UPDADE_NAME}
echo ""
echo "Making updateimg: ${IMAGE_SRC_CUR_PATH}/${UPDADE_NAME}"
exit 0
......@@ -46,11 +46,14 @@ service mtk_wpa_supp /system/bin/wpa_supplicant \
# for rtl wifi
service p2p_supp_rtl /system/bin/wpa_supplicant \
-ip2p0 -Dnl80211 -c/data/misc/wifi/p2p_supplicant.conf \
-e/data/misc/wifi/entropy.bin -N \
-iwlan0 -Dnl80211 -c/data/misc/wifi/wpa_supplicant.conf \
-O/data/misc/wifi/sockets \
-g@android:wpa_wlan0
-e/data/misc/wifi/entropy.bin -g@android:wpa_wlan0
#-I/system/etc/wifi/wpa_supplicant_overlay.conf \
# we will start as root and wpa_supplicant will switch to user wifi
# after setting up the capabilities required for WEXT
# user wifi
# group wifi inet keystore
class main
socket wpa_wlan0 dgram 660 wifi wifi
disabled
......
......@@ -70,8 +70,8 @@ typedef struct _wifi_devices
static wifi_device supported_wifi_devices[] = {
{"RTL8188EU", "0bda:8179"},
{"MTK7601U" , "148f:7601"},
{"RTL8188EU", "0bda:0179"},
{"RTL8188EU", "7392:7811"},
{"RTL8723BU", "0bda:b720"},
{"RTL8723BS", "024c:b723"},
{"RTL8822BS", "024c:b822"},
......@@ -84,6 +84,9 @@ static wifi_device supported_wifi_devices[] = {
{"RTL8192DU", "0bda:8194"},
{"RTL8812AU", "0bda:8812"},
{"RTL8812AU", "0bda:0811"},
{"RTL8811AU", "0bda:a811"},
{"RTL8821CU", "0bda:c820"},
{"MTK7601U" , "148f:7601"},
{"SSV6051", "3030:3030"},
{"ESP8089", "6666:1111"},
{"AP6354", "02d0:4354"},
......
......@@ -94,6 +94,8 @@ extern int ifc_down(const char *name);
#define RTL8189FS_DRIVER_MODULE_PATH "/system/lib/modules/8189fs.ko"
#define RTL8192DU_DRIVER_MODULE_PATH "/system/lib/modules/8192du.ko"
#define RTL8812AU_DRIVER_MODULE_PATH "/system/lib/modules/8812au.ko"
#define RTL8811AU_DRIVER_MODULE_PATH "/system/lib/modules/8811au.ko"
#define RTL8821CU_DRIVER_MODULE_PATH "/system/lib/modules/8821cu.ko"
#define RTL8822BE_DRIVER_MODULE_PATH "/system/lib/modules/8822be.ko"
#define SSV6051_DRIVER_MODULE_PATH "/system/lib/modules/ssv6051.ko"
#define ESP8089_DRIVER_MODULE_PATH "/system/lib/modules/esp8089.ko"
......@@ -113,6 +115,8 @@ extern int ifc_down(const char *name);
#define RTL8189FS_DRIVER_MODULE_NAME "8189fs"
#define RTL8192DU_DRIVER_MODULE_NAME "8192du"
#define RTL8812AU_DRIVER_MODULE_NAME "8812au"
#define RTL8812AU_DRIVER_MODULE_NAME "8811au"
#define RTL8821CU_DRIVER_MODULE_NAME "8821cu"
#define SSV6051_DRIVER_MODULE_NAME "ssv6051"
#define ESP8089_DRIVER_MODULE_NAME "esp8089"
#define BCM_DRIVER_MODULE_NAME "bcmdhd"
......@@ -214,6 +218,8 @@ wifi_ko_file_name module_list[] =
{"RTL8723CS", RTL8723CS_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8723DS", RTL8723DS_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8812AU", RTL8812AU_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8811AU", RTL8811AU_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8821CU", RTL8821CU_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8189FS", RTL8189FS_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"RTL8822BE", RTL8822BE_DRIVER_MODULE_PATH, UNKKOWN_DRIVER_MODULE_ARG},
{"SSV6051", SSV6051_DRIVER_MODULE_PATH, SSV6051_DRIVER_MODULE_ARG},
......
......@@ -1730,6 +1730,22 @@ static void adjust_table_by_leakage(struct dvfs_node *dvfs_node)
}
}
static void adjust_table_by_efuse(struct dvfs_node *dvfs_node, int adjust_volt)
{
int i;
struct cpufreq_frequency_table *dvfs_table;
if (!adjust_volt)
return;
if (!dvfs_node->dvfs_table)
return;
dvfs_table = dvfs_node->dvfs_table;
for (i = 0; (dvfs_table[i].frequency != CPUFREQ_TABLE_END); i++)
dvfs_table[i].index += adjust_volt;
}
static int dvfs_update_vd_volt(struct dvfs_node *clk_dvfs_node, bool force)
{
struct vd_node *vd;
......@@ -1762,6 +1778,8 @@ static int dvfs_update_vd_volt(struct dvfs_node *clk_dvfs_node, bool force)
static int initialize_dvfs_node(struct dvfs_node *clk_dvfs_node)
{
int volt;
if (IS_ERR_OR_NULL(clk_dvfs_node->vd->regulator)) {
if (clk_dvfs_node->vd->regulator_name)
clk_dvfs_node->vd->regulator =
......@@ -1795,10 +1813,15 @@ static int initialize_dvfs_node(struct dvfs_node *clk_dvfs_node)
clk_dvfs_node->freq_limit_en = 1;
clk_dvfs_node->max_limit_freq = clk_dvfs_node->max_rate;
if (clk_dvfs_node->lkg_adjust_volt_en)
adjust_table_by_leakage(clk_dvfs_node);
if (clk_dvfs_node->support_pvtm)
pvtm_set_dvfs_table(clk_dvfs_node);
volt = rockchip_efuse_get_volt_adjust(clk_dvfs_node->channel);
if (volt) {
adjust_table_by_efuse(clk_dvfs_node, volt);
} else {
if (clk_dvfs_node->lkg_adjust_volt_en)
adjust_table_by_leakage(clk_dvfs_node);
if (clk_dvfs_node->support_pvtm)
pvtm_set_dvfs_table(clk_dvfs_node);
}
dvfs_table_round_volt(clk_dvfs_node);
if (!clk_dvfs_node->skip_adjusting_volt)
......
......@@ -52,6 +52,7 @@ static u8 efuse_buf[32] = {};
struct rockchip_efuse {
int (*get_leakage)(int ch);
int (*get_temp)(int ch);
int (*get_volt_adjust)(int ch);
int efuse_version;
int process_version;
};
......@@ -313,6 +314,43 @@ int rk312x_efuse_readregs(u32 addr, u32 length, u8 *buf)
efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
(~EFUSE_STROBE), REG_EFUSE_CTRL);
udelay(2);
buf++;
addr++;
} while (--length);
udelay(2);
efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
(~EFUSE_LOAD), REG_EFUSE_CTRL);
udelay(1);
return ret;
}
int rk3036_efuse_readregs(u32 addr, u32 length, u8 *buf)
{
int ret = length;
if (!length)
return 0;
efuse_writel(EFUSE_LOAD, REG_EFUSE_CTRL);
udelay(2);
do {
efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
(~(RK3036_EFUSE_A_MASK << RK3036_EFUSE_A_SHIFT)),
REG_EFUSE_CTRL);
efuse_writel(efuse_readl(REG_EFUSE_CTRL) |
((addr & RK3036_EFUSE_A_MASK) << RK3036_EFUSE_A_SHIFT),
REG_EFUSE_CTRL);
udelay(2);
efuse_writel(efuse_readl(REG_EFUSE_CTRL) |
EFUSE_STROBE, REG_EFUSE_CTRL);
udelay(2);
*buf = efuse_readl(REG_EFUSE_DOUT);
efuse_writel(efuse_readl(REG_EFUSE_CTRL) &
(~EFUSE_STROBE), REG_EFUSE_CTRL);
udelay(2);
buf++;
addr++;
} while (--length);
......@@ -370,6 +408,13 @@ int rockchip_efuse_get_temp_adjust(int ch)
return temp;
}
int rockchip_efuse_get_volt_adjust(int ch)
{
if (efuse.get_volt_adjust)
return efuse.get_volt_adjust(ch);
return 0;
}
/**
* mul_frac() - multiply two fixed-point numbers
* @x: first multiplicand
......@@ -498,6 +543,16 @@ void __init rockchip_efuse_init(void)
efuse.get_leakage = rk3288_get_leakage;
else
pr_err("failed to read eFuse, return %d\n", ret);
} else if (cpu_is_rk3036()) {
ret = rk3036_efuse_readregs(0, 32, efuse_buf);
if (ret == 32) {
efuse.efuse_version = rk3288_get_efuse_version();
efuse.process_version = rk3288_get_process_version();
rockchip_set_cpu_version((efuse_buf[6] >> 4) & 3);
rk3288_set_system_serial();
} else {
pr_err("failed to read eFuse, return %d\n", ret);
}
}
}
......@@ -509,6 +564,19 @@ static int __init rk322xh_get_process_version(void)
return ret;
}
static int __init rk322xh_get_volt_adjust(int ch)
{
if (((efuse_buf[28] >> 4) & 0x07) == 0x5)
/* 50 mV */
return 50000;
/* arm leakage <= 8mA */
if (efuse_buf[23] <= 8)
return 25000;
return 0;
}
static int __init rockchip_efuse_probe(struct platform_device *pdev)
{
struct resource *regs;
......@@ -518,15 +586,25 @@ static int __init rockchip_efuse_probe(struct platform_device *pdev)
rockchip_copy_efuse();
efuse.get_leakage = rk3288_get_leakage;
efuse.get_volt_adjust = rk322xh_get_volt_adjust;
efuse.process_version = rk322xh_get_process_version();
rockchip_set_cpu_version((efuse_buf[26] >> 3) & 7);
rk3288_set_system_serial();
/*
* efuse_buf[28] bit6 represent sign, raise or down avs,
* efuse_buf[28] bit4-5 represent delta.
* adjust avs_delta by eFuse
*/
rk322xh_adjust_avs((efuse_buf[28] >> 6) & 0x01,
((efuse_buf[28] >> 4) & 0x03) * 4);
if (((efuse_buf[28] >> 4) & 0x07) == 0x1) {
int avs_delta, leakage;
leakage = rockchip_get_leakage(0);
if (leakage && (leakage <= 8))
avs_delta = 2;
else
avs_delta = 4;
rockchip_adjust_avs(avs_delta);
} else {
rockchip_adjust_avs(0);
}
return 0;
}
......
......@@ -6,7 +6,9 @@
/* eFuse controller register */
#define EFUSE_A_SHIFT (6)
#define RK312X_EFUSE_A_SHIFT (7)
#define RK3036_EFUSE_A_SHIFT (8)
#define EFUSE_A_MASK (0x3FF)
#define RK3036_EFUSE_A_MASK (0xFF)
//#define EFUSE_PD (1 << 5)
//#define EFUSE_PS (1 << 4)
#define EFUSE_PGENB (1 << 3) //active low
......@@ -31,4 +33,5 @@ int rockchip_get_leakage(int ch);
int rockchip_get_cvbs_adjust(void);
int rockchip_get_hdmi_flag(void);
int rockchip_efuse_get_temp_adjust(int ch);
int rockchip_efuse_get_volt_adjust(int ch);
#endif
......@@ -126,6 +126,7 @@ static void __init rk3036_dt_map_io(void)
dsb();
rk3036_boot_mode_init();
rockchip_efuse_init();
}
extern void secondary_startup(void);
......
......@@ -201,21 +201,21 @@
400000 900000
800000 1050000
933000 1150000
1066000 1200000
1024000 1200000
>;
freq-table = <
SYS_STATUS_NORMAL 1066000
SYS_STATUS_SUSPEND 1066000
SYS_STATUS_VIDEO_1080P 1066000
SYS_STATUS_VIDEO_4K 1066000
SYS_STATUS_PERFORMANCE 1066000
SYS_STATUS_DUALVIEW 1066000
SYS_STATUS_BOOST 1066000
SYS_STATUS_ISP 1066000
SYS_STATUS_NORMAL 1024000
SYS_STATUS_SUSPEND 1024000
SYS_STATUS_VIDEO_1080P 1024000
SYS_STATUS_VIDEO_4K 1024000
SYS_STATUS_PERFORMANCE 1024000
SYS_STATUS_DUALVIEW 1024000
SYS_STATUS_BOOST 1024000
SYS_STATUS_ISP 1024000
>;
auto-freq-table = <
1066000
1066000
1024000
1024000
>;
auto-freq = <0>;
......
This diff is collapsed.
......@@ -444,13 +444,14 @@
#define RK3368_PCLK_DBG_DIV(i) \
CLK_DIV_PLUS_ONE_SET(i, RK3368_PCLK_DBG_SHIFT, RK3368_PCLK_DBG_WIDTH)
#define _RK3368_APLL_SET_CLKS(_mhz, nr, nf, no, aclkm_div, atclk_div, pclk_dbg_div) \
#define _RK3368_APLL_SET_CLKS(_mhz, nr, nf, no, aclkm_div, atclk_div, \
pclk_dbg_div, flag) \
{ \
.rate = _mhz * MHZ, \
.pllcon0 = RK3188PLUS_PLL_CLKR_SET(nr) | RK3188PLUS_PLL_CLKOD_SET(no), \
.pllcon1 = RK3188PLUS_PLL_CLKF_SET(nf),\
.pllcon2 = RK3188PLUS_PLL_CLK_BWADJ_SET(nf >> 1),\
.rst_dly = ((nr*500)/24+1),\
.rst_dly = flag,\
.clksel0 = RK3368_ACLKM_CORE_DIV(aclkm_div),\
.clksel1 = RK3368_ATCLK_CORE_DIV(atclk_div) | RK3368_PCLK_DBG_DIV(pclk_dbg_div) \
}
......
......@@ -339,6 +339,6 @@ enum rv1108_cru_clk_gate {
#define RK322XH_CRU_SDMMCEXT_CON1 0x039C
extern int rockchip_avs_delta;
void rk322xh_adjust_avs(int sign_bit, int delta);
void rockchip_adjust_avs(int delta);
#endif
PRODUCT_COPY_FILES +=vendor/firefly/root/su:system/xbin/su
PRODUCT_COPY_FILES += \
vendor/firefly/root/su:system/xbin/su \
vendor/firefly/root/eject:system/bin/eject
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