Samsung SoC clock drivers changes for 6.1 1. Exynos7885: add FSYS, TREX and MFC clock controllers. 2. Exynos850: add IS and AUD (audio) clock controllers with bindings. 3. ExynosAutov9: add FSYS clock controllers with bindings. 4. ExynosAutov9: correct clock IDs in bindings of Peric 0 and 1 clock controllers, due to duplicated entries. This is an acceptable ABI break: recently developed/added platform so without legacies, acked by known users/developers. 5. ExynosAutov9: add few missing Peric 0/1 gates. 6. ExynosAutov9: correct register offsets of few Peric 0/1 clocks. 7. Minor code improvements (use of_device_get_match_data() helper, code style). 8. Add Krzysztof Kozlowski as co-maintainer of Samsung SoC clocks, as he already maintainers that architecture/platform.