Commit 8c6ec8d3 authored by Linaro CI's avatar Linaro CI

Merge remote-tracking branch 'qcs404-dt/tracking-qcomlt-qcs404-dt' into integration-linux-qcomlt

# Conflicts:
#	arch/arm64/boot/dts/qcom/qcs404.dtsi
parents d4990fe0 a7b4203b
......@@ -23,6 +23,10 @@ platforms.
Value type: <phandle>
Definition: phandle to the input PLL, which feeds the APCS mux/divider
Usage: required if #clock-names property is present
Value type: <phandle array>
Definition: phandles to the two parent clocks of the clock driver.
- #mbox-cells:
Usage: required
Value type: <u32>
......@@ -33,6 +37,12 @@ platforms.
Value type: <u32>
Definition: as described in clock.txt, must be 0
- clock-names:
Usage: required if the platform data based clock driver needs to
retrieve the parent clock names from device tree.
This will requires two mandatory clocks to be defined.
Value type: <string-array>
Definition: must be "aux" and "pll"
= EXAMPLE
The following example describes the APCS HMSS found in MSM8996 and part of the
......@@ -65,3 +75,14 @@ Below is another example of the APCS binding on MSM8916 platforms:
clocks = <&a53pll>;
#clock-cells = <0>;
};
Below is another example of the APCS binding on QCS404 platforms:
apcs_glb: [email protected] {
compatible = "qcom,qcs404-apcs-apps-global", "syscon";
reg = <0x0b011000 0x1000>;
#mbox-cells = <1>;
clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>;
clock-names = "aux", "pll";
#clock-cells = <0>;
};
......@@ -9,6 +9,7 @@ Qualcomm SPMI Regulators
"qcom,pm8941-regulators"
"qcom,pm8994-regulators"
"qcom,pmi8994-regulators"
"qcom,pms405-regulators"
- interrupts:
Usage: optional
......@@ -110,6 +111,29 @@ Qualcomm SPMI Regulators
Definition: Reference to regulator supplying the input pin, as
described in the data sheet.
- vdd_s1-supply:
- vdd_s2-supply:
- vdd_s3-supply:
- vdd_s4-supply:
- vdd_s5-supply:
- vdd_l1-supply:
- vdd_l2-supply:
- vdd_l3-supply:
- vdd_l4-supply:
- vdd_l5-supply:
- vdd_l6-supply:
- vdd_l7-supply:
- vdd_l8-supply:
- vdd_l9-supply:
- vdd_l10-supply:
- vdd_l11-supply:
- vdd_l12-supply:
- vdd_l13-supply:
Usage: optional (pms405 only)
Value type: <phandle>
Definition: Reference to regulator supplying the input pin, as
described in the data sheet.
- qcom,saw-reg:
Usage: optional
Value type: <phandle>
......
......@@ -137,4 +137,24 @@
interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>;
};
};
pms405_1: [email protected] {
compatible = "qcom,spmi-pmic";
reg = <0x1 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
regulators {
compatible = "qcom,pms405-regulators";
vdd_s3-supply = <&pms405_s3>;
pms405_s3: s3 {
regulator-always-on;
regulator-boot-on;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <1048000>;
regulator-max-microvolt = <1352000>;
};
};
};
};
......@@ -3,6 +3,8 @@
#include "qcs404.dtsi"
#include "pms405.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
/ {
aliases {
......@@ -19,6 +21,25 @@
regulator-always-on;
regulator-boot-on;
};
usb3_vbus_reg: regulator-usb3-vbus {
compatible = "regulator-fixed";
regulator-name = "VBUS_5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&pms405_gpios 3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_vbus_boost_pin>;
enable-active-high;
};
usb3_con: usb3-connector {
compatible = "linux,extcon-usb-gpio";
id-gpio = <&tlmm 116 GPIO_ACTIVE_HIGH>;
vbus-gpio = <&pms405_gpios 12 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb3_id_pin>, <&usb3_vbus_pin>;
};
};
&remoteproc_adsp {
......@@ -39,7 +60,7 @@
vdd-s1-supply = <&vph_pwr>;
vdd-s2-supply = <&vph_pwr>;
vdd-s3-supply = <&vph_pwr>;
vdd-s3-supply = <&pms405_s3>;
vdd-s4-supply = <&vph_pwr>;
vdd-s5-supply = <&vph_pwr>;
vdd-l1-l2-supply = <&vreg_s5_1p35>;
......@@ -186,6 +207,109 @@
bias-pull-down;
};
};
usb3_id_pin: usb3-id-pin {
pinmux {
pins = "gpio116";
function = "gpio";
};
pinconf {
pins = "gpio116";
drive-strength = <2>;
bias-pull-up;
input-enable;
};
};
};
&pms405_gpios {
usb3_vbus_boost_pin: usb3-vbus-boost-pin {
pinconf {
pins = "gpio3";
function = PMIC_GPIO_FUNC_NORMAL;
output-low;
power-source = <1>;
};
};
usb3_vbus_pin: usb3-vbus-pin {
pinconf {
pins = "gpio12";
function = PMIC_GPIO_FUNC_NORMAL;
input-enable;
bias-pull-down;
power-source = <1>;
};
};
};
&usb2 {
status = "okay";
};
&usb2_phy_prim {
vdd-supply = <&vreg_l4_1p2>;
vdda1p8-supply = <&vreg_l5_1p8>;
vdda3p3-supply = <&vreg_l12_3p3>;
qcom,vdd-voltage-level = <0 1144000 1200000>;
status = "okay";
};
&usb2_phy_sec {
vdd-supply = <&vreg_l4_1p2>;
vdda1p8-supply = <&vreg_l5_1p8>;
vdda3p3-supply = <&vreg_l12_3p3>;
qcom,vdd-voltage-level = <0 1144000 1200000>;
status = "okay";
};
&usb3 {
extcon = <&usb3_con>;
status = "okay";
[email protected] {
extcon = <&usb3_con>;
};
};
&usb3_phy {
vdd-supply = <&vreg_l3_1p05>;
vdda1p8-supply = <&vreg_l5_1p8>;
vbus-supply = <&usb3_vbus_reg>;
qcom,vdd-voltage-level = <0 1050000 1050000>;
status = "okay";
};
&usb2 {
status = "okay";
};
&usb2_phy_prim {
vdd-supply = <&vreg_l4_1p2>;
vdda1p8-supply = <&vreg_l5_1p8>;
vdda3p3-supply = <&vreg_l12_3p3>;
qcom,vdd-voltage-level = <0 1144000 1200000>;
status = "okay";
};
&usb2_phy_sec {
vdd-supply = <&vreg_l4_1p2>;
vdda1p8-supply = <&vreg_l5_1p8>;
vdda3p3-supply = <&vreg_l12_3p3>;
qcom,vdd-voltage-level = <0 1144000 1200000>;
status = "okay";
};
&usb3 {
status = "disabled";
};
&usb3_phy {
vdd-supply = <&vreg_l3_1p05>;
vdda1p8-supply = <&vreg_l5_1p8>;
qcom,vdd-voltage-level = <0 1050000 1050000>;
status = "disabled";
};
&wifi {
......
......@@ -33,6 +33,9 @@
enable-method = "psci";
next-level-cache = <&L2_0>;
#cooling-cells= <2>;
clocks = <&apcs_glb>;
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&pms405_s3>;
};
CPU1: [email protected] {
......@@ -42,6 +45,9 @@
enable-method = "psci";
next-level-cache = <&L2_0>;
#cooling-cells= <2>;
clocks = <&apcs_glb>;
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&pms405_s3>;
};
CPU2: [email protected] {
......@@ -51,6 +57,9 @@
enable-method = "psci";
next-level-cache = <&L2_0>;
#cooling-cells= <2>;
clocks = <&apcs_glb>;
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&pms405_s3>;
};
CPU3: [email protected] {
......@@ -60,6 +69,9 @@
enable-method = "psci";
next-level-cache = <&L2_0>;
#cooling-cells= <2>;
clocks = <&apcs_glb>;
operating-points-v2 = <&cpu_opp_table>;
cpu-supply = <&pms405_s3>;
};
L2_0: l2-cache {
......@@ -68,6 +80,24 @@
};
};
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-1094400000 {
opp-hz = /bits/ 64 <1094400000>;
opp-microvolt = <1224000 1224000 1224000>;
};
opp-1248000000 {
opp-hz = /bits/ 64 <1248000000>;
opp-microvolt = <1288000 1288000 1288000>;
};
opp-1401600000 {
opp-hz = /bits/ 64 <1401600000>;
opp-microvolt = <1352000 1352000 1352000>;
};
};
firmware {
scm: scm {
compatible = "qcom,scm-qcs404", "qcom,scm";
......@@ -114,6 +144,34 @@
mboxes = <&apcs_glb 8>;
label = "adsp";
#address-cells = <1>;
#size-cells = <0>;
fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "adsp";
#address-cells = <1>;
#size-cells = <0>;
qcom,msm_fastrpc_compute_cb_1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
};
qcom,msm_fastrpc_compute_cb_2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
};
qcom,msm_fastrpc_compute_cb_3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
shared-cb = <5>;
};
};
};
};
......@@ -145,6 +203,43 @@
mboxes = <&apcs_glb 12>;
label = "cdsp";
#address-cells = <1>;
#size-cells = <0>;
fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
label = "cdsp";
#address-cells = <1>;
#size-cells = <0>;
qcom,msm_fastrpc_compute_cb_1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
};
qcom,msm_fastrpc_compute_cb_2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
};
qcom,msm_fastrpc_compute_cb_3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
};
qcom,msm_fastrpc_compute_cb_4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
};
qcom,msm_fastrpc_compute_cb_5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
};
};
};
};
......@@ -281,6 +376,132 @@
clock-names = "core";
};
usb3_phy: [email protected] {
compatible = "qcom,usb-ssphy";
reg = <0x78000 0x400>;
#phy-cells = <0>;
clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
<&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB3_PHY_PIPE_CLK>;
clock-names = "ref", "phy", "pipe";
resets = <&gcc GCC_USB3_PHY_BCR>,
<&gcc GCC_USB3PHY_PHY_BCR>;
reset-names = "com", "phy";
status = "disabled";
};
usb2_phy_prim: [email protected] {
compatible = "qcom,qcs404-usb-hsphy";
reg = <0x7a000 0x200>;
#phy-cells = <0>;
clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
<&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "phy", "sleep";
resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>,
<&gcc GCC_USB2A_PHY_BCR>;
reset-names = "phy", "por";
qcom,init-seq = <0xc0 0x01 0>,
<0xe8 0x0d 0>,
<0x74 0x12 0>,
<0x98 0x63 0>,
<0x9c 0x03 0>,
<0xa0 0x1d 0>,
<0xa4 0x03 0>,
<0x8c 0x23 0>,
<0x78 0x08 0>,
<0x7c 0xdc 0>,
<0x90 0xe0 20>,
<0x74 0x10 0>,
<0x90 0x60 0>;
status = "disabled";
};
usb2_phy_sec: [email protected] {
compatible = "qcom,qcs404-usb-hsphy";
reg = <0x7c000 0x200>;
#phy-cells = <0>;
clocks = <&rpmcc RPM_SMD_LN_BB_CLK>,
<&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>,
<&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "phy", "sleep";
resets = <&gcc GCC_QUSB2_PHY_BCR>,
<&gcc GCC_USB2_HS_PHY_ONLY_BCR>;
reset-names = "phy", "por";
qcom,init-seq = <0xc0 0x01 0>,
<0xe8 0x0d 0>,
<0x74 0x12 0>,
<0x98 0x63 0>,
<0x9c 0x03 0>,
<0xa0 0x1d 0>,
<0xa4 0x03 0>,
<0x8c 0x23 0>,
<0x78 0x08 0>,
<0x7c 0xdc 0>,
<0x90 0xe0 20>,
<0x74 0x10 0>,
<0x90 0x60 0>;
status = "disabled";
};
usb3: [email protected] {
compatible = "qcom,dwc3";
reg = <0x07678800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&gcc GCC_USB30_MASTER_CLK>,
<&gcc GCC_SYS_NOC_USB3_CLK>,
<&gcc GCC_USB30_SLEEP_CLK>,
<&gcc GCC_USB30_MOCK_UTMI_CLK>;
clock-names = "core", "iface", "sleep", "mock_utmi";
assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_MASTER_CLK>;
assigned-clock-rates = <19200000>, <200000000>;
status = "disabled";
[email protected] {
compatible = "snps,dwc3";
reg = <0x07580000 0xcd00>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy_sec>, <&usb3_phy>;
phy-names = "usb2-phy", "usb3-phy";
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
dr_mode = "otg";
};
};
usb2: [email protected] {
compatible = "qcom,dwc3";
reg = <0x079b8800 0x400>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>,
<&gcc GCC_PCNOC_USB2_CLK>,
<&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>,
<&gcc GCC_USB20_MOCK_UTMI_CLK>;
clock-names = "core", "iface", "sleep", "mock_utmi";
assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
<&gcc GCC_USB_HS_SYSTEM_CLK>;
assigned-clock-rates = <19200000>, <133333333>;
status = "disabled";
[email protected] {
compatible = "snps,dwc3";
reg = <0x078c0000 0xcc00>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
phys = <&usb2_phy_prim>;
phy-names = "usb2-phy";
snps,has-lpm-erratum;
snps,hird-threshold = /bits/ 8 <0x10>;
snps,usb3_lpm_capable;
dr_mode = "peripheral";
};
};
tsens: [email protected] {
compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
reg = <0x004a9000 0x1000>, /* TM */
......@@ -408,6 +629,7 @@
compatible = "qcom,gcc-qcs404";
reg = <0x01800000 0x80000>;
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks = <&gcc GCC_APSS_AHB_CLK_SRC>;
assigned-clock-rates = <19200000>;
......@@ -742,6 +964,18 @@
compatible = "qcom,qcs404-apcs-apps-global", "syscon";
reg = <0x0b011000 0x1000>;
#mbox-cells = <1>;
clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>;
clock-names = "aux", "pll";
#clock-cells = <0>;
};
apcs_hfpll: [email protected] {
compatible = "qcom,hfpll";
reg = <0x0b016000 0x30>;
#clock-cells = <0>;
clock-output-names = "apcs_hfpll";
clocks = <&xo_board>;
clock-names = "xo";
};
[email protected] {
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment