Commit 527ab93f authored by Linaro CI's avatar Linaro CI

Merge remote-tracking branch 'qcs404-cpufreq/qcomlt/qcs404-cpufreq' into integration-linux-qcomlt

parents 8c6ec8d3 b796707b
......@@ -19,7 +19,7 @@
static const u32 gpll0_a53cc_map[] = { 4, 5 };
static const char * const gpll0_a53cc[] = {
static const char *gpll0_a53cc[] = {
"gpll0_vote",
"a53pll",
};
......@@ -50,17 +50,39 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
struct regmap *regmap;
struct clk_init_data init = { };
int ret = -ENODEV;
struct clk_bulk_data pclks[] = {
[0] = { .id = "aux", .clk = NULL },
[1] = { .id = "pll", .clk = NULL },
};
regmap = dev_get_regmap(parent, NULL);
if (!regmap) {
dev_err(dev, "failed to get regmap: %d\n", ret);
return ret;
}
a53cc = devm_kzalloc(dev, sizeof(*a53cc), GFP_KERNEL);
if (!a53cc)
return -ENOMEM;
/* check if the parent names are present in the device tree */
ret = devm_clk_bulk_get(parent, ARRAY_SIZE(pclks), pclks);
if (ret == -EPROBE_DEFER)
return ret;
if (!ret) {
gpll0_a53cc[0] = __clk_get_name(pclks[0].clk);
gpll0_a53cc[1] = __clk_get_name(pclks[1].clk);
a53cc->pclk = pclks[1].clk;
} else {
/* support old binding where only pll was explicitily defined */
a53cc->pclk = devm_clk_get(parent, NULL);
if (IS_ERR(a53cc->pclk)) {
ret = PTR_ERR(a53cc->pclk);
dev_err(dev, "failed to get clk: %d\n", ret);
return ret;
}
}
init.name = "a53mux";
init.parent_names = gpll0_a53cc;
init.num_parents = ARRAY_SIZE(gpll0_a53cc);
......@@ -76,13 +98,6 @@ static int qcom_apcs_msm8916_clk_probe(struct platform_device *pdev)
a53cc->src_shift = 8;
a53cc->parent_map = gpll0_a53cc_map;
a53cc->pclk = devm_clk_get(parent, NULL);
if (IS_ERR(a53cc->pclk)) {
ret = PTR_ERR(a53cc->pclk);
dev_err(dev, "failed to get clk: %d\n", ret);
return ret;
}
a53cc->clk_nb.notifier_call = a53cc_notifier_cb;
ret = clk_notifier_register(a53cc->pclk, &a53cc->clk_nb);
if (ret) {
......
......@@ -730,6 +730,14 @@ static long alpha_pll_huayra_round_rate(struct clk_hw *hw, unsigned long rate,
return alpha_huayra_pll_round_rate(rate, *prate, &l, &a);
}
const struct clk_ops clk_alpha_pll_fixed_ops = {
.enable = clk_alpha_pll_enable,
.disable = clk_alpha_pll_disable,
.is_enabled = clk_alpha_pll_is_enabled,
.recalc_rate = clk_alpha_pll_recalc_rate,
};
EXPORT_SYMBOL_GPL(clk_alpha_pll_fixed_ops);
const struct clk_ops clk_alpha_pll_ops = {
.enable = clk_alpha_pll_enable,
.disable = clk_alpha_pll_disable,
......
......@@ -110,6 +110,7 @@ struct alpha_pll_config {
};
extern const struct clk_ops clk_alpha_pll_ops;
extern const struct clk_ops clk_alpha_pll_fixed_ops;
extern const struct clk_ops clk_alpha_pll_hwfsm_ops;
extern const struct clk_ops clk_alpha_pll_postdiv_ops;
extern const struct clk_ops clk_alpha_pll_huayra_ops;
......
......@@ -304,6 +304,7 @@ static struct clk_alpha_pll gpll0_out_main = {
},
};
static struct clk_alpha_pll gpll0_ao_out_main = {
.offset = 0x21000,
.regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_DEFAULT],
......@@ -316,7 +317,7 @@ static struct clk_alpha_pll gpll0_ao_out_main = {
.parent_names = (const char *[]){ "cxo" },
.num_parents = 1,
.flags = CLK_IS_CRITICAL,
.ops = &clk_alpha_pll_ops,
.ops = &clk_alpha_pll_fixed_ops,
},
},
};
......
......@@ -52,10 +52,13 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
void __iomem *base;
struct regmap *regmap;
struct clk_hfpll *h;
struct clk *pclk;
int ret;
struct clk_init_data init = {
.parent_names = (const char *[]){ "xo" },
.num_parents = 1,
.ops = &clk_ops_hfpll,
.flags = CLK_IGNORE_UNUSED,
};
h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL);
......@@ -75,11 +78,25 @@ static int qcom_hfpll_probe(struct platform_device *pdev)
0, &init.name))
return -ENODEV;
/* get parent clock from device tree (optional) */
pclk = devm_clk_get(dev, "xo");
if (!IS_ERR(pclk))
init.parent_names = (const char *[]){ __clk_get_name(pclk) };
else if (PTR_ERR(pclk) == -EPROBE_DEFER)
return -EPROBE_DEFER;
h->d = &hdata;
h->clkr.hw.init = &init;
spin_lock_init(&h->lock);
return devm_clk_register_regmap(&pdev->dev, &h->clkr);
ret = devm_clk_register_regmap(dev, &h->clkr);
if (ret) {
dev_err(dev, "failed to register regmap clock: %d\n", ret);
return ret;
}
return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
&h->clkr.hw);
}
static struct platform_driver qcom_hfpll_driver = {
......
......@@ -97,16 +97,21 @@ static int qcom_apcs_ipc_probe(struct platform_device *pdev)
return ret;
}
if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global")) {
apcs->clk = platform_device_register_data(&pdev->dev,
"qcom-apcs-msm8916-clk",
-1, NULL, 0);
if (IS_ERR(apcs->clk))
dev_err(&pdev->dev, "failed to register APCS clk\n");
}
platform_set_drvdata(pdev, apcs);
if (of_device_is_compatible(np, "qcom,msm8916-apcs-kpss-global") ||
of_device_is_compatible(np, "qcom,qcs404-apcs-apps-global"))
goto register_clk;
return 0;
register_clk:
apcs->clk = platform_device_register_data(&pdev->dev,
"qcom-apcs-msm8916-clk",
PLATFORM_DEVID_NONE, NULL, 0);
if (IS_ERR(apcs->clk))
dev_err(&pdev->dev, "failed to register APCS clk\n");
return 0;
}
......
This diff is collapsed.
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment