Read differences of bit_vector and std_logic_vector
Summary
VHDL-2008 implementation of std_ulogic_vector
read differs from bit_vector
read.
TWiki page: Read differences of bit_vector and std_logic_vector
Bugzilla: Bugzilla 277
Details
There appear to be inconsistencies in various READ commands when an illegal character is found.
The LRM states in 16.4 Package TEXTIO:
Character removal and string composition also stops when a character is encountered that cannot be part of the value according to the rules for string representations, or, in the case of the READ procedure for BIT_VECTOR, is not an underline character that can be removed according to the preceding rule; this character is not removed from L and is not added to the string representation of the value.
However the body of READ[line, std_ulogic_vector, boolean]
skips whitespace correctly in the line and then reads one character at a time, checks that character for legality and proceeds. So an illegal character is removed from L
.
In addition, the VHDL source code version of textio functions OREAD
and others, supplied by @dbishopx, also reads characters and checks for legality.
Although there is no direct requirement that these various READ
functions be uniform, I believe that there is an implicit assumption that they are. One advantage of a uniform treatment is that designers can safely switch between bit vectors and standard logic vectors.
Solution 1: Make std_ulogic_vector compatible with bit_vector
Fix the code in std_logic_1164 so that it is consistent with bit_vector reads.
Solution 2: Leave them as they are
In both cases these are failures. There is no ability to do anything with the current read value. Does it make sense to facilitate reading the thing that caused the failure?
Recommendations
Solution 1. Make them std_ulogic_vector consistent with bit_vector.