LRM Typo: 6.5.7.1 Generic and Port Maps use semicolons

The example in section 6.5.7.1 use semicolons instead of commas in the generic and port maps.

They should be commas and there should be a semicolon after the generic declaration.

  Architecture A of E is
      signal SigA : std_logic_vector(7 downto 0);
      signal SigB : std_logic;
      component C is
      port (
          A : type is private; -- any type
          B : type is <>       -- a scalar type
      );
      end component C;
  begin
      -- A component instance whose type of the formal signal port A
      -- is defined by an unspecified type declaration.
      E1 : C
          port map (
-             A => SigA;
+             A => SigA,
              B => SigB
          );
      ...

  -- The equivalent component declaration and instance.
  Architecture A of E is
      signal SigA : std_logic_vector(7 downto 0);
      signal SigB : std_logic;
      -- The equivalent component declaration is formed by the rules
      -- of Clause 6.5.2
      component C is
          generic (
              type Anonymous1 is private;  -- any type
              type Anonymous2 is <>        -- a scalar type
-          )
+          );
          port (
              A : Anonymous1;
              B : Anonymous2
          ) ;
          end component C;

  begin
      -- The equivalent component instance has a generic map to
      -- associate the subtype of actual port SigA with the formal
      -- generic type Anonymous. The component instance has the same
      -- port map as the original instance.
      E1 : C
          generic map (
-             Anonymous1 => SigA'SUBTYPE ;
+             Anonymous1 => SigA'SUBTYPE,
              Anonymous2 => SigB'SUBTYPE
          )
          port map (
-             A => SigA ;
+             A => SigA,
              B => SigB
          );