Add a way to write a resolution function which applies to any discrete type
Is your capability/feature request related to a problem? Please describe.
When writing VHDL, I make extensive use of custom enumeration types for pretty much anything. So, naturally, I also want to use them in my OSVVM verification components.
The problem is that when I want to pass it via my OSVVM record, it needs to be a resolved type. I don't really care about how it's resolved most of the time, so it's pretty much always just a simple "give me the rightmost element." With ≤VHDL-2008 (and possibly 2019), I either need to create that function with the same body for each enumeration type that I have, or I need to convert to integer and back. Both solutions are kind of cumbersome / not clean.
Describe the solution you'd like.
I would like a feature to create a resolved enumeration type with just a single line using a resolution function that can be generically written for all discrete types.
In practice, this could be something like allowing to create a "generic" resolution function that takes any (array of) discrete type(s) as argument and returns the discrete type. The internal logic could then work using attributes etc. to construct the actual resolution function. I somehow feel like adding this functionality would mess with the wonderful strict typing that VHDL has right now though, so it might not be best.
So my second idea would be to extend generic functions to make what I tried in the next section work (if that's not already the case since VHDL-2019)
Describe alternatives you've considered.
I tried to implement this using generic types in functions (which strictly speaking would not be a one-line solution, but one line plus is fine), but couldn't get it to compile (tested on QuestaSim, Riviera Pro 2020.04, and GHDL). Not sure whether it's a limitation of the language or if I simply use generic types incorrectly. My attempts were:
package generic_resolv is
function resolve_right
generic(
type discrete_type;
type array_type
)
parameter(s : array_type)
return discrete_type;
end package generic_resolv;
package body generic_resolv is
function resolve_right
generic(
type discrete_type;
type array_type
)
parameter(s : array_type)
return discrete_type is
variable min : discrete_type := array_type'left;
begin
for i in s'range loop
min := s(i) when (discrete_type'pos(s(i)) > discrete_type'pos(min));
end loop;
return min;
end function resolve_right;
end package body generic_resolv;
This, however, doesn't compile as I don't have the 'left
, 'pos
, and 'range
attributes. Trying to specify the type in more detail (I think this is VHDL-2019, right?) doesn't compile either:
package generic_resolv is
function resolve_right
generic(
type discrete_type is (<>);
type array_type is array (<>) of discrete_type
)
parameter(s : array_type)
return discrete_type;
end package generic_resolv;
Additional context
I'm honestly not 100% sure whether this is already supported by the language (as part of VHDL-2019) and just not yet implemented by most vendors. If that's the case, you can close this issue and I guess I'll go yell at my tool vendors ;D