Commit 81f48581 authored by Alan Wood's avatar Alan Wood

Added SRAM pinouts to mystorm PCF file

parent e94b91a6
......@@ -130,8 +130,6 @@ For both the DFU and Uart bootloading make sure you have the boot jumper set lik
boot
```
*Nucleo_l476rg is the existing target we use as a cheat due to it's similarity to the STM32L476 configuration we are using on myStorm (be careful as mem is actually lower on myStorm). Eventually we will have our own but it requires quite a lot of work to get that done for all the different platforms like MBED/STM etc..
The example program also includes some printf usage using the built in Uart (on the 40 pin header Rx pin 8, Tx pin 10) to receive this use a USB-serial adapter/cable and something like screen:
```
......@@ -144,3 +142,5 @@ Another useful command to know BTW:
platformio run --target clean
```
*Nucleo_l476rg is the existing target we use as a cheat due to it's similarity to the STM32L476 configuration we are using on myStorm (be careful as mem is actually lower on myStorm). Eventually we will have our own but it requires quite a lot of work to get that done for all the different platforms like MBED/STM etc..
......@@ -16,10 +16,10 @@
# User Constraint File for myStorm
#myStorm SPI link ARM to ICE40
set_io miso 67
set_io mosi 68
set_io sck 70
set_io cs 71
set_io MISO 67
set_io MOSI 68
set_io SCK 70
set_io CS 71
#myStorm leds
#set_io LED[0] 37
......@@ -105,6 +105,48 @@ set_io PMOD[49] 79
set_io PMOD[50] 64
set_io PMOD[51] 63
# SRAM
set_io ADR[0] 137
set_io ADR[1] 138
set_io ADR[2] 139
set_io ADR[3] 141
set_io ADR[4] 142
set_io ADR[5] 42
set_io ADR[6] 43
set_io ADR[7] 44
set_io ADR[8] 73
set_io ADR[9] 74
set_io ADR[10] 75
set_io ADR[11] 76
set_io ADR[12] 115
set_io ADR[13] 116
set_io ADR[14] 117
set_io ADR[15] 118
set_io ADR[16] 119
set_io ADR[17] 78
set_io ADR[18] 62
set_io DAT[0] 135
set_io DAT[1] 134
set_io DAT[2] 130
set_io DAT[3] 128
set_io DAT[4] 125
set_io DAT[5] 124
set_io DAT[6] 122
set_io DAT[7] 121
set_io DAT[8] 61
set_io DAT[9] 60
set_io DAT[10] 56
set_io DAT[11] 55
set_io DAT[12] 52
set_io DAT[13] 49
set_io DAT[14] 48
set_io DAT[15] 47
set_io RAMOE 45
set_io RAMWE 120
set_io RAMCS 136
# Onboard 12Mhz oscillator
set_io clk 129
......@@ -17,14 +17,21 @@
*
*/
module SPI_PWM(
// 50MHz clock input
// 100MHz clock input
input clk,
input sck,
input mosi,
output miso,
input cs,
// Outputs to the 8 onboard LEDs
input SCK,
input MOSI,
output MISO,
input CS,
output[51:0]PMOD,
output [18:0]ADR,
//inout [15:0]DAT,
// Set data to output to avoid arachnepnr error cause by not using tristate pins:
//"fatal error: toplevel inout port 'DAT[0]' not connected to SB_IO PACKAGE_PIN"
output [15:0]DAT,
output RAMOE,
output RAMWE,
output RAMCS,
);
localparam p = 4;
......@@ -37,10 +44,10 @@ wire [7:0] addr, val;
shiftreg mysr (
//100Mhz clock
.sck(sck),
.sck(SCK),
//.rst(rst), to implement
.cs(cs),
.si(mosi),
.cs(CS),
.si(MOSI),
.addr(addr),
.data(val)
);
......@@ -52,6 +59,7 @@ generate
.rst(rst),
.clk(clk),
.compare(pwmr[i]),
// Outputs to the 8 onboard LEDs
.pwm(PMOD[44+i])
);
end
......
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