Contribution for logic tester: Commodore 64 PLA

Hi, This is not an issue.

The web page below shares how to test a Commodore 64 PLA using a TL866-II+ and Xgpro. http://www.breakintoprogram.co.uk/hardware/fixing-a-poorly-commodore-64-part-3

I believe it should also work a TL866 using minipro. I do not have a working chip to confirm and so far my post on a french forum did not have any reply (https://www.amigafrance.com/forums/topic/tester-un-pla-de-c64-avec-un-tl866-et-le-logiciel-minipro/), so I hope a minipro user coming here may be able to confirm that it is working ?

Here is the data to add to logicic.xml :

      <ic name="C64PLA" type="5" voltage="5V" pins="28">
        <vector id="00"> X X X X X X X X X Z Z Z Z G Z Z Z Z 1 X X X X X X X X V </vector>
        <vector id="01"> X X X X X X X X X L X X X G X X X H 0 1 1 0 1 X 1 X X V </vector>
        <vector id="02"> X 1 1 1 X X X X X L X X X G X X X H 0 X X 0 1 X 0 X X V </vector>
        <vector id="03"> X 1 0 1 X X 1 X X L X X X G X X X H 0 X X 0 0 1 0 X X V </vector>
        <vector id="04"> X 0 0 1 X X X X X X L X X G X X X H 0 X X 0 1 X 0 X X V </vector>
        <vector id="05"> X 0 0 1 X X 1 1 X X L X X G X X X H 0 X X X 0 1 0 X X V </vector>
        <vector id="06"> X 0 1 1 X 1 1 X X X X L X G X X X H 0 X X X X 0 0 X 1 V </vector>
        <vector id="07"> X 0 1 1 X X X X X X X L X G X X X H 0 X X 0 1 0 0 X 1 V </vector>
        <vector id="08"> X 0 1 1 X 1 0 1 X X X L X G X X X H 0 X X X X 0 0 X 1 V </vector>
        <vector id="09"> X 0 1 1 X 1 1 X X X X L X G X X X H 0 X X X X 1 0 1 1 V </vector>
        <vector id="10"> X 0 1 1 X X X X X X X L X G X X X H 0 X X 0 1 1 0 1 1 V </vector>
        <vector id="11"> X 0 1 1 X 1 0 1 X X X L X G X X X H 0 X X X X 1 0 1 1 V </vector>
        <vector id="12"> X 0 1 1 X X X X 0 X X X L G X X X X 0 X X X X 0 0 X 1 V </vector>
        <vector id="13"> X X X X 1 X X X X X X X X G L X X H 0 1 0 X 0 X 1 X X V </vector>
        <vector id="14"> X X X X 1 X X X X X X X X G L X X H 0 1 0 1 1 X 1 X X V </vector>
        <vector id="15"> X 0 1 1 X 0 1 X X X X X X G L X X H 0 X X 1 X 1 0 X 1 V </vector>
        <vector id="16"> X 0 1 1 X 0 0 1 X X X X X G L X X H 0 X X 1 X 1 0 X 1 V </vector>
        <vector id="17"> X 0 1 1 X 0 1 X X X X X X G L X X H 0 X X 0 0 1 0 X 1 V </vector>
        <vector id="18"> X 1 1 1 X X 1 X X X X X X G X L X H 0 X X 1 X 1 0 X X V </vector>
        <vector id="19"> X 1 1 1 X X 1 X X X X X X G X L X H 0 X X 0 0 1 0 X X V </vector>
        <vector id="20"> X 1 0 1 X X 1 1 X X X X X G X X X H 0 X X 1 X 1 0 X X V </vector>
        <vector id="21"> X X X X X X X X 1 X X X X G X X X H 0 X X X X X X X X V </vector>
        <vector id="22"> X X 1 0 X X X X 0 X X X X G X X X H 0 X X 0 1 X X X X V </vector>
        <vector id="23"> X 1 0 X X X X X 0 X X X X G X X X H 0 X X 0 1 X X X X V </vector>
        <vector id="24"> X 0 0 0 X X X X 0 X X X X G X X X H 0 X X 0 1 X X X 1 V </vector>
        <vector id="25"> X 0 1 1 X X X X 0 X X X X G X X X H 0 X X 0 1 X X X 0 V </vector>
        <vector id="26"> X X X X X X X X X H H H H G H H H X 0 X X X X X X X X V </vector>
      </ic>

I am also interested to dump/test the C64 ROMs and maybe it would be possible without any hardware adapter ? In infoic.xml I see that there is a pin map but that does not allow to define which signal goes to which pin. And I haven't found such a definition in the code apart from sending a protocol ID to the programmer. For this I would like a bit more information about what it may be possible to do so I upvote for issue #237.

To upload designs, you'll need to enable LFS and have an admin enable hashed storage. More information